gpu: nvgpu: initialze bundle64 state

We receive bundle with address and 64 bit values from ucode on some platforms
This patch adds the support to handle 64 bit values

Add struct av64_gk20a to store an address and corresponding 64 bit value
Add struct av64_list_gk20a to store count and list of av64_gk20a

Add API alloc_av64_list_gk20a() to allocate the list that supports 64bit
values

In gr_gk20a_init_ctx_vars_fw(), if we see NETLIST_REGIONID_SW_BUNDLE64_INIT,
load the bundle64 state into above local structures

Add new HAL gops.gr.init_sw_bundle64() and call it from gk20a_init_sw_bundle()
if defined

Also load the bundle for simulation cases in gr_gk20a_init_ctx_vars_sim()

Jira NVGPUT-96

Change-Id: I1ab7fb37ff91c5fbd968c93d714725b01fd4f59b
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1736450
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

1 files changed, 17 insertions, 0 deletions

diff --git a/drivers/gpu/nvgpu/gk20a/gr_ctx_gk20a.h b/drivers/gpu/nvgpu/gk20a/gr_ctx_gk20a.h
index afc3e9df..10f8723f 100644
--- a/drivers/gpu/nvgpu/gk20a/gr_ctx_gk20a.h
+++ b/drivers/gpu/nvgpu/gk20a/gr_ctx_gk20a.h
@@ -105,6 +105,7 @@ union __max_name {
 #define NETLIST_REGIONID_CTXREG_PMROP           31
 #define NETLIST_REGIONID_CTXREG_PMUCGPC         32
 #define NETLIST_REGIONID_CTXREG_ETPC            33
+#define NETLIST_REGIONID_SW_BUNDLE64_INIT       34
 #define NETLIST_REGIONID_NVPERF_PMCAU           35
 
 struct netlist_region {
@@ -127,6 +128,11 @@ struct av_gk20a {
         u32 addr;
         u32 value;
 };
+struct av64_gk20a {
+        u32 addr;
+        u32 value_lo;
+        u32 value_hi;
+};
 struct aiv_gk20a {
         u32 addr;
         u32 index;
@@ -140,6 +146,10 @@ struct av_list_gk20a {
         struct av_gk20a *l;
         u32 count;
 };
+struct av64_list_gk20a {
+        struct av64_gk20a *l;
+        u32 count;
+};
 struct u32_list_gk20a {
         u32 *l;
         u32 count;
@@ -158,6 +168,13 @@ struct av_gk20a *alloc_av_list_gk20a(struct gk20a *g, struct av_list_gk20a *avl)
 }
 
 static inline
+struct av64_gk20a *alloc_av64_list_gk20a(struct gk20a *g, struct av64_list_gk20a *avl)
+{
+        avl->l = nvgpu_kzalloc(g, avl->count * sizeof(*avl->l));
+        return avl->l;
+}
+
+static inline
 struct aiv_gk20a *alloc_aiv_list_gk20a(struct gk20a *g,
                                        struct aiv_list_gk20a *aivl)
 {