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authorTerje Bergstrom <tbergstrom@nvidia.com>2018-04-18 22:39:46 -0400
committermobile promotions <svcmobile_promotions@nvidia.com>2018-05-09 21:26:04 -0400
commitdd739fcb039d51606e9a5454ec0aab17bcb01965 (patch)
tree806ba8575d146367ad1be00086ca0cdae35a6b28 /drivers/gpu/nvgpu/gk20a/gr_ctx_gk20a.c
parent7e66f2a63d4855e763fa768047dfc32f6f96b771 (diff)
gpu: nvgpu: Remove gk20a_dbg* functions
Switch all logging to nvgpu_log*(). gk20a_dbg* macros are intentionally left there because of use from other repositories. Because the new functions do not work without a pointer to struct gk20a, and piping it just for logging is excessive, some log messages are deleted. Change-Id: I00e22e75fe4596a330bb0282ab4774b3639ee31e Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1704148 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gk20a/gr_ctx_gk20a.c')
-rw-r--r--drivers/gpu/nvgpu/gk20a/gr_ctx_gk20a.c82
1 files changed, 40 insertions, 42 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/gr_ctx_gk20a.c b/drivers/gpu/nvgpu/gk20a/gr_ctx_gk20a.c
index 7120059c..f829cb3a 100644
--- a/drivers/gpu/nvgpu/gk20a/gr_ctx_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/gr_ctx_gk20a.c
@@ -1,9 +1,7 @@
1/* 1/*
2 * drivers/video/tegra/host/gk20a/gr_ctx_gk20a.c
3 *
4 * GK20A Graphics Context 2 * GK20A Graphics Context
5 * 3 *
6 * Copyright (c) 2011-2017, NVIDIA CORPORATION. All rights reserved. 4 * Copyright (c) 2011-2018, NVIDIA CORPORATION. All rights reserved.
7 * 5 *
8 * Permission is hereby granted, free of charge, to any person obtaining a 6 * Permission is hereby granted, free of charge, to any person obtaining a
9 * copy of this software and associated documentation files (the "Software"), 7 * copy of this software and associated documentation files (the "Software"),
@@ -79,7 +77,7 @@ static int gr_gk20a_init_ctx_vars_fw(struct gk20a *g, struct gr_gk20a *gr)
79 u32 i, major_v = ~0, major_v_hw, netlist_num; 77 u32 i, major_v = ~0, major_v_hw, netlist_num;
80 int net, max, err = -ENOENT; 78 int net, max, err = -ENOENT;
81 79
82 gk20a_dbg_fn(""); 80 nvgpu_log_fn(g, " ");
83 81
84 if (g->ops.gr_ctx.is_fw_defined()) { 82 if (g->ops.gr_ctx.is_fw_defined()) {
85 net = NETLIST_FINAL; 83 net = NETLIST_FINAL;
@@ -114,63 +112,63 @@ static int gr_gk20a_init_ctx_vars_fw(struct gk20a *g, struct gr_gk20a *gr)
114 112
115 switch (netlist->regions[i].region_id) { 113 switch (netlist->regions[i].region_id) {
116 case NETLIST_REGIONID_FECS_UCODE_DATA: 114 case NETLIST_REGIONID_FECS_UCODE_DATA:
117 gk20a_dbg_info("NETLIST_REGIONID_FECS_UCODE_DATA"); 115 nvgpu_log_info(g, "NETLIST_REGIONID_FECS_UCODE_DATA");
118 err = gr_gk20a_alloc_load_netlist_u32(g, 116 err = gr_gk20a_alloc_load_netlist_u32(g,
119 src, size, &g->gr.ctx_vars.ucode.fecs.data); 117 src, size, &g->gr.ctx_vars.ucode.fecs.data);
120 if (err) 118 if (err)
121 goto clean_up; 119 goto clean_up;
122 break; 120 break;
123 case NETLIST_REGIONID_FECS_UCODE_INST: 121 case NETLIST_REGIONID_FECS_UCODE_INST:
124 gk20a_dbg_info("NETLIST_REGIONID_FECS_UCODE_INST"); 122 nvgpu_log_info(g, "NETLIST_REGIONID_FECS_UCODE_INST");
125 err = gr_gk20a_alloc_load_netlist_u32(g, 123 err = gr_gk20a_alloc_load_netlist_u32(g,
126 src, size, &g->gr.ctx_vars.ucode.fecs.inst); 124 src, size, &g->gr.ctx_vars.ucode.fecs.inst);
127 if (err) 125 if (err)
128 goto clean_up; 126 goto clean_up;
129 break; 127 break;
130 case NETLIST_REGIONID_GPCCS_UCODE_DATA: 128 case NETLIST_REGIONID_GPCCS_UCODE_DATA:
131 gk20a_dbg_info("NETLIST_REGIONID_GPCCS_UCODE_DATA"); 129 nvgpu_log_info(g, "NETLIST_REGIONID_GPCCS_UCODE_DATA");
132 err = gr_gk20a_alloc_load_netlist_u32(g, 130 err = gr_gk20a_alloc_load_netlist_u32(g,
133 src, size, &g->gr.ctx_vars.ucode.gpccs.data); 131 src, size, &g->gr.ctx_vars.ucode.gpccs.data);
134 if (err) 132 if (err)
135 goto clean_up; 133 goto clean_up;
136 break; 134 break;
137 case NETLIST_REGIONID_GPCCS_UCODE_INST: 135 case NETLIST_REGIONID_GPCCS_UCODE_INST:
138 gk20a_dbg_info("NETLIST_REGIONID_GPCCS_UCODE_INST"); 136 nvgpu_log_info(g, "NETLIST_REGIONID_GPCCS_UCODE_INST");
139 err = gr_gk20a_alloc_load_netlist_u32(g, 137 err = gr_gk20a_alloc_load_netlist_u32(g,
140 src, size, &g->gr.ctx_vars.ucode.gpccs.inst); 138 src, size, &g->gr.ctx_vars.ucode.gpccs.inst);
141 if (err) 139 if (err)
142 goto clean_up; 140 goto clean_up;
143 break; 141 break;
144 case NETLIST_REGIONID_SW_BUNDLE_INIT: 142 case NETLIST_REGIONID_SW_BUNDLE_INIT:
145 gk20a_dbg_info("NETLIST_REGIONID_SW_BUNDLE_INIT"); 143 nvgpu_log_info(g, "NETLIST_REGIONID_SW_BUNDLE_INIT");
146 err = gr_gk20a_alloc_load_netlist_av(g, 144 err = gr_gk20a_alloc_load_netlist_av(g,
147 src, size, &g->gr.ctx_vars.sw_bundle_init); 145 src, size, &g->gr.ctx_vars.sw_bundle_init);
148 if (err) 146 if (err)
149 goto clean_up; 147 goto clean_up;
150 break; 148 break;
151 case NETLIST_REGIONID_SW_METHOD_INIT: 149 case NETLIST_REGIONID_SW_METHOD_INIT:
152 gk20a_dbg_info("NETLIST_REGIONID_SW_METHOD_INIT"); 150 nvgpu_log_info(g, "NETLIST_REGIONID_SW_METHOD_INIT");
153 err = gr_gk20a_alloc_load_netlist_av(g, 151 err = gr_gk20a_alloc_load_netlist_av(g,
154 src, size, &g->gr.ctx_vars.sw_method_init); 152 src, size, &g->gr.ctx_vars.sw_method_init);
155 if (err) 153 if (err)
156 goto clean_up; 154 goto clean_up;
157 break; 155 break;
158 case NETLIST_REGIONID_SW_CTX_LOAD: 156 case NETLIST_REGIONID_SW_CTX_LOAD:
159 gk20a_dbg_info("NETLIST_REGIONID_SW_CTX_LOAD"); 157 nvgpu_log_info(g, "NETLIST_REGIONID_SW_CTX_LOAD");
160 err = gr_gk20a_alloc_load_netlist_aiv(g, 158 err = gr_gk20a_alloc_load_netlist_aiv(g,
161 src, size, &g->gr.ctx_vars.sw_ctx_load); 159 src, size, &g->gr.ctx_vars.sw_ctx_load);
162 if (err) 160 if (err)
163 goto clean_up; 161 goto clean_up;
164 break; 162 break;
165 case NETLIST_REGIONID_SW_NON_CTX_LOAD: 163 case NETLIST_REGIONID_SW_NON_CTX_LOAD:
166 gk20a_dbg_info("NETLIST_REGIONID_SW_NON_CTX_LOAD"); 164 nvgpu_log_info(g, "NETLIST_REGIONID_SW_NON_CTX_LOAD");
167 err = gr_gk20a_alloc_load_netlist_av(g, 165 err = gr_gk20a_alloc_load_netlist_av(g,
168 src, size, &g->gr.ctx_vars.sw_non_ctx_load); 166 src, size, &g->gr.ctx_vars.sw_non_ctx_load);
169 if (err) 167 if (err)
170 goto clean_up; 168 goto clean_up;
171 break; 169 break;
172 case NETLIST_REGIONID_SWVEIDBUNDLEINIT: 170 case NETLIST_REGIONID_SWVEIDBUNDLEINIT:
173 gk20a_dbg_info( 171 nvgpu_log_info(g,
174 "NETLIST_REGIONID_SW_VEID_BUNDLE_INIT"); 172 "NETLIST_REGIONID_SW_VEID_BUNDLE_INIT");
175 err = gr_gk20a_alloc_load_netlist_av(g, 173 err = gr_gk20a_alloc_load_netlist_av(g,
176 src, size, 174 src, size,
@@ -179,56 +177,56 @@ static int gr_gk20a_init_ctx_vars_fw(struct gk20a *g, struct gr_gk20a *gr)
179 goto clean_up; 177 goto clean_up;
180 break; 178 break;
181 case NETLIST_REGIONID_CTXREG_SYS: 179 case NETLIST_REGIONID_CTXREG_SYS:
182 gk20a_dbg_info("NETLIST_REGIONID_CTXREG_SYS"); 180 nvgpu_log_info(g, "NETLIST_REGIONID_CTXREG_SYS");
183 err = gr_gk20a_alloc_load_netlist_aiv(g, 181 err = gr_gk20a_alloc_load_netlist_aiv(g,
184 src, size, &g->gr.ctx_vars.ctxsw_regs.sys); 182 src, size, &g->gr.ctx_vars.ctxsw_regs.sys);
185 if (err) 183 if (err)
186 goto clean_up; 184 goto clean_up;
187 break; 185 break;
188 case NETLIST_REGIONID_CTXREG_GPC: 186 case NETLIST_REGIONID_CTXREG_GPC:
189 gk20a_dbg_info("NETLIST_REGIONID_CTXREG_GPC"); 187 nvgpu_log_info(g, "NETLIST_REGIONID_CTXREG_GPC");
190 err = gr_gk20a_alloc_load_netlist_aiv(g, 188 err = gr_gk20a_alloc_load_netlist_aiv(g,
191 src, size, &g->gr.ctx_vars.ctxsw_regs.gpc); 189 src, size, &g->gr.ctx_vars.ctxsw_regs.gpc);
192 if (err) 190 if (err)
193 goto clean_up; 191 goto clean_up;
194 break; 192 break;
195 case NETLIST_REGIONID_CTXREG_TPC: 193 case NETLIST_REGIONID_CTXREG_TPC:
196 gk20a_dbg_info("NETLIST_REGIONID_CTXREG_TPC"); 194 nvgpu_log_info(g, "NETLIST_REGIONID_CTXREG_TPC");
197 err = gr_gk20a_alloc_load_netlist_aiv(g, 195 err = gr_gk20a_alloc_load_netlist_aiv(g,
198 src, size, &g->gr.ctx_vars.ctxsw_regs.tpc); 196 src, size, &g->gr.ctx_vars.ctxsw_regs.tpc);
199 if (err) 197 if (err)
200 goto clean_up; 198 goto clean_up;
201 break; 199 break;
202 case NETLIST_REGIONID_CTXREG_ZCULL_GPC: 200 case NETLIST_REGIONID_CTXREG_ZCULL_GPC:
203 gk20a_dbg_info("NETLIST_REGIONID_CTXREG_ZCULL_GPC"); 201 nvgpu_log_info(g, "NETLIST_REGIONID_CTXREG_ZCULL_GPC");
204 err = gr_gk20a_alloc_load_netlist_aiv(g, 202 err = gr_gk20a_alloc_load_netlist_aiv(g,
205 src, size, &g->gr.ctx_vars.ctxsw_regs.zcull_gpc); 203 src, size, &g->gr.ctx_vars.ctxsw_regs.zcull_gpc);
206 if (err) 204 if (err)
207 goto clean_up; 205 goto clean_up;
208 break; 206 break;
209 case NETLIST_REGIONID_CTXREG_PPC: 207 case NETLIST_REGIONID_CTXREG_PPC:
210 gk20a_dbg_info("NETLIST_REGIONID_CTXREG_PPC"); 208 nvgpu_log_info(g, "NETLIST_REGIONID_CTXREG_PPC");
211 err = gr_gk20a_alloc_load_netlist_aiv(g, 209 err = gr_gk20a_alloc_load_netlist_aiv(g,
212 src, size, &g->gr.ctx_vars.ctxsw_regs.ppc); 210 src, size, &g->gr.ctx_vars.ctxsw_regs.ppc);
213 if (err) 211 if (err)
214 goto clean_up; 212 goto clean_up;
215 break; 213 break;
216 case NETLIST_REGIONID_CTXREG_PM_SYS: 214 case NETLIST_REGIONID_CTXREG_PM_SYS:
217 gk20a_dbg_info("NETLIST_REGIONID_CTXREG_PM_SYS"); 215 nvgpu_log_info(g, "NETLIST_REGIONID_CTXREG_PM_SYS");
218 err = gr_gk20a_alloc_load_netlist_aiv(g, 216 err = gr_gk20a_alloc_load_netlist_aiv(g,
219 src, size, &g->gr.ctx_vars.ctxsw_regs.pm_sys); 217 src, size, &g->gr.ctx_vars.ctxsw_regs.pm_sys);
220 if (err) 218 if (err)
221 goto clean_up; 219 goto clean_up;
222 break; 220 break;
223 case NETLIST_REGIONID_CTXREG_PM_GPC: 221 case NETLIST_REGIONID_CTXREG_PM_GPC:
224 gk20a_dbg_info("NETLIST_REGIONID_CTXREG_PM_GPC"); 222 nvgpu_log_info(g, "NETLIST_REGIONID_CTXREG_PM_GPC");
225 err = gr_gk20a_alloc_load_netlist_aiv(g, 223 err = gr_gk20a_alloc_load_netlist_aiv(g,
226 src, size, &g->gr.ctx_vars.ctxsw_regs.pm_gpc); 224 src, size, &g->gr.ctx_vars.ctxsw_regs.pm_gpc);
227 if (err) 225 if (err)
228 goto clean_up; 226 goto clean_up;
229 break; 227 break;
230 case NETLIST_REGIONID_CTXREG_PM_TPC: 228 case NETLIST_REGIONID_CTXREG_PM_TPC:
231 gk20a_dbg_info("NETLIST_REGIONID_CTXREG_PM_TPC"); 229 nvgpu_log_info(g, "NETLIST_REGIONID_CTXREG_PM_TPC");
232 err = gr_gk20a_alloc_load_netlist_aiv(g, 230 err = gr_gk20a_alloc_load_netlist_aiv(g,
233 src, size, &g->gr.ctx_vars.ctxsw_regs.pm_tpc); 231 src, size, &g->gr.ctx_vars.ctxsw_regs.pm_tpc);
234 if (err) 232 if (err)
@@ -236,110 +234,110 @@ static int gr_gk20a_init_ctx_vars_fw(struct gk20a *g, struct gr_gk20a *gr)
236 break; 234 break;
237 case NETLIST_REGIONID_BUFFER_SIZE: 235 case NETLIST_REGIONID_BUFFER_SIZE:
238 g->gr.ctx_vars.buffer_size = *src; 236 g->gr.ctx_vars.buffer_size = *src;
239 gk20a_dbg_info("NETLIST_REGIONID_BUFFER_SIZE : %d", 237 nvgpu_log_info(g, "NETLIST_REGIONID_BUFFER_SIZE : %d",
240 g->gr.ctx_vars.buffer_size); 238 g->gr.ctx_vars.buffer_size);
241 break; 239 break;
242 case NETLIST_REGIONID_CTXSW_REG_BASE_INDEX: 240 case NETLIST_REGIONID_CTXSW_REG_BASE_INDEX:
243 g->gr.ctx_vars.regs_base_index = *src; 241 g->gr.ctx_vars.regs_base_index = *src;
244 gk20a_dbg_info("NETLIST_REGIONID_CTXSW_REG_BASE_INDEX : %u", 242 nvgpu_log_info(g, "NETLIST_REGIONID_CTXSW_REG_BASE_INDEX : %u",
245 g->gr.ctx_vars.regs_base_index); 243 g->gr.ctx_vars.regs_base_index);
246 break; 244 break;
247 case NETLIST_REGIONID_MAJORV: 245 case NETLIST_REGIONID_MAJORV:
248 major_v = *src; 246 major_v = *src;
249 gk20a_dbg_info("NETLIST_REGIONID_MAJORV : %d", 247 nvgpu_log_info(g, "NETLIST_REGIONID_MAJORV : %d",
250 major_v); 248 major_v);
251 break; 249 break;
252 case NETLIST_REGIONID_NETLIST_NUM: 250 case NETLIST_REGIONID_NETLIST_NUM:
253 netlist_num = *src; 251 netlist_num = *src;
254 gk20a_dbg_info("NETLIST_REGIONID_NETLIST_NUM : %d", 252 nvgpu_log_info(g, "NETLIST_REGIONID_NETLIST_NUM : %d",
255 netlist_num); 253 netlist_num);
256 break; 254 break;
257 case NETLIST_REGIONID_CTXREG_PMPPC: 255 case NETLIST_REGIONID_CTXREG_PMPPC:
258 gk20a_dbg_info("NETLIST_REGIONID_CTXREG_PMPPC"); 256 nvgpu_log_info(g, "NETLIST_REGIONID_CTXREG_PMPPC");
259 err = gr_gk20a_alloc_load_netlist_aiv(g, 257 err = gr_gk20a_alloc_load_netlist_aiv(g,
260 src, size, &g->gr.ctx_vars.ctxsw_regs.pm_ppc); 258 src, size, &g->gr.ctx_vars.ctxsw_regs.pm_ppc);
261 if (err) 259 if (err)
262 goto clean_up; 260 goto clean_up;
263 break; 261 break;
264 case NETLIST_REGIONID_NVPERF_CTXREG_SYS: 262 case NETLIST_REGIONID_NVPERF_CTXREG_SYS:
265 gk20a_dbg_info("NETLIST_REGIONID_NVPERF_CTXREG_SYS"); 263 nvgpu_log_info(g, "NETLIST_REGIONID_NVPERF_CTXREG_SYS");
266 err = gr_gk20a_alloc_load_netlist_aiv(g, 264 err = gr_gk20a_alloc_load_netlist_aiv(g,
267 src, size, &g->gr.ctx_vars.ctxsw_regs.perf_sys); 265 src, size, &g->gr.ctx_vars.ctxsw_regs.perf_sys);
268 if (err) 266 if (err)
269 goto clean_up; 267 goto clean_up;
270 break; 268 break;
271 case NETLIST_REGIONID_NVPERF_FBP_CTXREGS: 269 case NETLIST_REGIONID_NVPERF_FBP_CTXREGS:
272 gk20a_dbg_info("NETLIST_REGIONID_NVPERF_FBP_CTXREGS"); 270 nvgpu_log_info(g, "NETLIST_REGIONID_NVPERF_FBP_CTXREGS");
273 err = gr_gk20a_alloc_load_netlist_aiv(g, 271 err = gr_gk20a_alloc_load_netlist_aiv(g,
274 src, size, &g->gr.ctx_vars.ctxsw_regs.fbp); 272 src, size, &g->gr.ctx_vars.ctxsw_regs.fbp);
275 if (err) 273 if (err)
276 goto clean_up; 274 goto clean_up;
277 break; 275 break;
278 case NETLIST_REGIONID_NVPERF_CTXREG_GPC: 276 case NETLIST_REGIONID_NVPERF_CTXREG_GPC:
279 gk20a_dbg_info("NETLIST_REGIONID_NVPERF_CTXREG_GPC"); 277 nvgpu_log_info(g, "NETLIST_REGIONID_NVPERF_CTXREG_GPC");
280 err = gr_gk20a_alloc_load_netlist_aiv(g, 278 err = gr_gk20a_alloc_load_netlist_aiv(g,
281 src, size, &g->gr.ctx_vars.ctxsw_regs.perf_gpc); 279 src, size, &g->gr.ctx_vars.ctxsw_regs.perf_gpc);
282 if (err) 280 if (err)
283 goto clean_up; 281 goto clean_up;
284 break; 282 break;
285 case NETLIST_REGIONID_NVPERF_FBP_ROUTER: 283 case NETLIST_REGIONID_NVPERF_FBP_ROUTER:
286 gk20a_dbg_info("NETLIST_REGIONID_NVPERF_FBP_ROUTER"); 284 nvgpu_log_info(g, "NETLIST_REGIONID_NVPERF_FBP_ROUTER");
287 err = gr_gk20a_alloc_load_netlist_aiv(g, 285 err = gr_gk20a_alloc_load_netlist_aiv(g,
288 src, size, &g->gr.ctx_vars.ctxsw_regs.fbp_router); 286 src, size, &g->gr.ctx_vars.ctxsw_regs.fbp_router);
289 if (err) 287 if (err)
290 goto clean_up; 288 goto clean_up;
291 break; 289 break;
292 case NETLIST_REGIONID_NVPERF_GPC_ROUTER: 290 case NETLIST_REGIONID_NVPERF_GPC_ROUTER:
293 gk20a_dbg_info("NETLIST_REGIONID_NVPERF_GPC_ROUTER"); 291 nvgpu_log_info(g, "NETLIST_REGIONID_NVPERF_GPC_ROUTER");
294 err = gr_gk20a_alloc_load_netlist_aiv(g, 292 err = gr_gk20a_alloc_load_netlist_aiv(g,
295 src, size, &g->gr.ctx_vars.ctxsw_regs.gpc_router); 293 src, size, &g->gr.ctx_vars.ctxsw_regs.gpc_router);
296 if (err) 294 if (err)
297 goto clean_up; 295 goto clean_up;
298 break; 296 break;
299 case NETLIST_REGIONID_CTXREG_PMLTC: 297 case NETLIST_REGIONID_CTXREG_PMLTC:
300 gk20a_dbg_info("NETLIST_REGIONID_CTXREG_PMLTC"); 298 nvgpu_log_info(g, "NETLIST_REGIONID_CTXREG_PMLTC");
301 err = gr_gk20a_alloc_load_netlist_aiv(g, 299 err = gr_gk20a_alloc_load_netlist_aiv(g,
302 src, size, &g->gr.ctx_vars.ctxsw_regs.pm_ltc); 300 src, size, &g->gr.ctx_vars.ctxsw_regs.pm_ltc);
303 if (err) 301 if (err)
304 goto clean_up; 302 goto clean_up;
305 break; 303 break;
306 case NETLIST_REGIONID_CTXREG_PMFBPA: 304 case NETLIST_REGIONID_CTXREG_PMFBPA:
307 gk20a_dbg_info("NETLIST_REGIONID_CTXREG_PMFBPA"); 305 nvgpu_log_info(g, "NETLIST_REGIONID_CTXREG_PMFBPA");
308 err = gr_gk20a_alloc_load_netlist_aiv(g, 306 err = gr_gk20a_alloc_load_netlist_aiv(g,
309 src, size, &g->gr.ctx_vars.ctxsw_regs.pm_fbpa); 307 src, size, &g->gr.ctx_vars.ctxsw_regs.pm_fbpa);
310 if (err) 308 if (err)
311 goto clean_up; 309 goto clean_up;
312 break; 310 break;
313 case NETLIST_REGIONID_NVPERF_SYS_ROUTER: 311 case NETLIST_REGIONID_NVPERF_SYS_ROUTER:
314 gk20a_dbg_info("NETLIST_REGIONID_NVPERF_SYS_ROUTER"); 312 nvgpu_log_info(g, "NETLIST_REGIONID_NVPERF_SYS_ROUTER");
315 err = gr_gk20a_alloc_load_netlist_aiv(g, 313 err = gr_gk20a_alloc_load_netlist_aiv(g,
316 src, size, &g->gr.ctx_vars.ctxsw_regs.perf_sys_router); 314 src, size, &g->gr.ctx_vars.ctxsw_regs.perf_sys_router);
317 if (err) 315 if (err)
318 goto clean_up; 316 goto clean_up;
319 break; 317 break;
320 case NETLIST_REGIONID_NVPERF_PMA: 318 case NETLIST_REGIONID_NVPERF_PMA:
321 gk20a_dbg_info("NETLIST_REGIONID_NVPERF_PMA"); 319 nvgpu_log_info(g, "NETLIST_REGIONID_NVPERF_PMA");
322 err = gr_gk20a_alloc_load_netlist_aiv(g, 320 err = gr_gk20a_alloc_load_netlist_aiv(g,
323 src, size, &g->gr.ctx_vars.ctxsw_regs.perf_pma); 321 src, size, &g->gr.ctx_vars.ctxsw_regs.perf_pma);
324 if (err) 322 if (err)
325 goto clean_up; 323 goto clean_up;
326 break; 324 break;
327 case NETLIST_REGIONID_CTXREG_PMROP: 325 case NETLIST_REGIONID_CTXREG_PMROP:
328 gk20a_dbg_info("NETLIST_REGIONID_CTXREG_PMROP"); 326 nvgpu_log_info(g, "NETLIST_REGIONID_CTXREG_PMROP");
329 err = gr_gk20a_alloc_load_netlist_aiv(g, 327 err = gr_gk20a_alloc_load_netlist_aiv(g,
330 src, size, &g->gr.ctx_vars.ctxsw_regs.pm_rop); 328 src, size, &g->gr.ctx_vars.ctxsw_regs.pm_rop);
331 if (err) 329 if (err)
332 goto clean_up; 330 goto clean_up;
333 break; 331 break;
334 case NETLIST_REGIONID_CTXREG_PMUCGPC: 332 case NETLIST_REGIONID_CTXREG_PMUCGPC:
335 gk20a_dbg_info("NETLIST_REGIONID_CTXREG_PMUCGPC"); 333 nvgpu_log_info(g, "NETLIST_REGIONID_CTXREG_PMUCGPC");
336 err = gr_gk20a_alloc_load_netlist_aiv(g, 334 err = gr_gk20a_alloc_load_netlist_aiv(g,
337 src, size, &g->gr.ctx_vars.ctxsw_regs.pm_ucgpc); 335 src, size, &g->gr.ctx_vars.ctxsw_regs.pm_ucgpc);
338 if (err) 336 if (err)
339 goto clean_up; 337 goto clean_up;
340 break; 338 break;
341 case NETLIST_REGIONID_CTXREG_ETPC: 339 case NETLIST_REGIONID_CTXREG_ETPC:
342 gk20a_dbg_info("NETLIST_REGIONID_CTXREG_ETPC"); 340 nvgpu_log_info(g, "NETLIST_REGIONID_CTXREG_ETPC");
343 err = gr_gk20a_alloc_load_netlist_aiv(g, 341 err = gr_gk20a_alloc_load_netlist_aiv(g,
344 src, size, &g->gr.ctx_vars.ctxsw_regs.etpc); 342 src, size, &g->gr.ctx_vars.ctxsw_regs.etpc);
345 if (err) 343 if (err)
@@ -347,13 +345,13 @@ static int gr_gk20a_init_ctx_vars_fw(struct gk20a *g, struct gr_gk20a *gr)
347 break; 345 break;
348 346
349 default: 347 default:
350 gk20a_dbg_info("unrecognized region %d skipped", i); 348 nvgpu_log_info(g, "unrecognized region %d skipped", i);
351 break; 349 break;
352 } 350 }
353 } 351 }
354 352
355 if (net != NETLIST_FINAL && major_v != major_v_hw) { 353 if (net != NETLIST_FINAL && major_v != major_v_hw) {
356 gk20a_dbg_info("skip %s: major_v 0x%08x doesn't match hw 0x%08x", 354 nvgpu_log_info(g, "skip %s: major_v 0x%08x doesn't match hw 0x%08x",
357 name, major_v, major_v_hw); 355 name, major_v, major_v_hw);
358 goto clean_up; 356 goto clean_up;
359 } 357 }
@@ -362,7 +360,7 @@ static int gr_gk20a_init_ctx_vars_fw(struct gk20a *g, struct gr_gk20a *gr)
362 g->gr.netlist = net; 360 g->gr.netlist = net;
363 361
364 nvgpu_release_firmware(g, netlist_fw); 362 nvgpu_release_firmware(g, netlist_fw);
365 gk20a_dbg_fn("done"); 363 nvgpu_log_fn(g, "done");
366 goto done; 364 goto done;
367 365
368clean_up: 366clean_up:
@@ -403,7 +401,7 @@ clean_up:
403 401
404done: 402done:
405 if (g->gr.ctx_vars.valid) { 403 if (g->gr.ctx_vars.valid) {
406 gk20a_dbg_info("netlist image %s loaded", name); 404 nvgpu_log_info(g, "netlist image %s loaded", name);
407 return 0; 405 return 0;
408 } else { 406 } else {
409 nvgpu_err(g, "failed to load netlist image!!"); 407 nvgpu_err(g, "failed to load netlist image!!");
generated by cgit v1.2.2 (git 2.25.0) at 2024-07-04 21:44:50 -0400