diff options
author | Srirangan <smadhavan@nvidia.com> | 2018-08-31 03:50:52 -0400 |
---|---|---|
committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2018-09-05 07:51:32 -0400 |
commit | 43851d41b187c92f5ea9c2f503a882277f661d7e (patch) | |
tree | 964a76c136c8c0dc14ec95358d27f930532b7dcb /drivers/gpu/nvgpu/gk20a/gr_ctx_gk20a.c | |
parent | 0f97bd4d44c8bcedf298f725fe0b6cfc70fa81ff (diff) |
gpu: nvgpu: gk20a: Fix MISRA 15.6 violations
MISRA Rule-15.6 requires that all if-else blocks be enclosed in braces,
including single statement blocks. Fix errors due to single statement
if blocks without braces by introducing the braces.
JIRA NVGPU-671
Change-Id: Iedac7d50aa2ebd409434eea5fda902b16d9c6fea
Signed-off-by: Srirangan <smadhavan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1797695
Reviewed-by: svc-misra-checker <svc-misra-checker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gk20a/gr_ctx_gk20a.c')
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/gr_ctx_gk20a.c | 113 |
1 files changed, 75 insertions, 38 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/gr_ctx_gk20a.c b/drivers/gpu/nvgpu/gk20a/gr_ctx_gk20a.c index 956d0434..8b9ac326 100644 --- a/drivers/gpu/nvgpu/gk20a/gr_ctx_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/gr_ctx_gk20a.c | |||
@@ -38,8 +38,9 @@ static int gr_gk20a_alloc_load_netlist_u32(struct gk20a *g, u32 *src, u32 len, | |||
38 | struct u32_list_gk20a *u32_list) | 38 | struct u32_list_gk20a *u32_list) |
39 | { | 39 | { |
40 | u32_list->count = (len + sizeof(u32) - 1) / sizeof(u32); | 40 | u32_list->count = (len + sizeof(u32) - 1) / sizeof(u32); |
41 | if (!alloc_u32_list_gk20a(g, u32_list)) | 41 | if (!alloc_u32_list_gk20a(g, u32_list)) { |
42 | return -ENOMEM; | 42 | return -ENOMEM; |
43 | } | ||
43 | 44 | ||
44 | memcpy(u32_list->l, src, len); | 45 | memcpy(u32_list->l, src, len); |
45 | 46 | ||
@@ -50,8 +51,9 @@ static int gr_gk20a_alloc_load_netlist_av(struct gk20a *g, u32 *src, u32 len, | |||
50 | struct av_list_gk20a *av_list) | 51 | struct av_list_gk20a *av_list) |
51 | { | 52 | { |
52 | av_list->count = len / sizeof(struct av_gk20a); | 53 | av_list->count = len / sizeof(struct av_gk20a); |
53 | if (!alloc_av_list_gk20a(g, av_list)) | 54 | if (!alloc_av_list_gk20a(g, av_list)) { |
54 | return -ENOMEM; | 55 | return -ENOMEM; |
56 | } | ||
55 | 57 | ||
56 | memcpy(av_list->l, src, len); | 58 | memcpy(av_list->l, src, len); |
57 | 59 | ||
@@ -62,8 +64,9 @@ static int gr_gk20a_alloc_load_netlist_av64(struct gk20a *g, u32 *src, u32 len, | |||
62 | struct av64_list_gk20a *av64_list) | 64 | struct av64_list_gk20a *av64_list) |
63 | { | 65 | { |
64 | av64_list->count = len / sizeof(struct av64_gk20a); | 66 | av64_list->count = len / sizeof(struct av64_gk20a); |
65 | if (!alloc_av64_list_gk20a(g, av64_list)) | 67 | if (!alloc_av64_list_gk20a(g, av64_list)) { |
66 | return -ENOMEM; | 68 | return -ENOMEM; |
69 | } | ||
67 | 70 | ||
68 | memcpy(av64_list->l, src, len); | 71 | memcpy(av64_list->l, src, len); |
69 | 72 | ||
@@ -74,8 +77,9 @@ static int gr_gk20a_alloc_load_netlist_aiv(struct gk20a *g, u32 *src, u32 len, | |||
74 | struct aiv_list_gk20a *aiv_list) | 77 | struct aiv_list_gk20a *aiv_list) |
75 | { | 78 | { |
76 | aiv_list->count = len / sizeof(struct aiv_gk20a); | 79 | aiv_list->count = len / sizeof(struct aiv_gk20a); |
77 | if (!alloc_aiv_list_gk20a(g, aiv_list)) | 80 | if (!alloc_aiv_list_gk20a(g, aiv_list)) { |
78 | return -ENOMEM; | 81 | return -ENOMEM; |
82 | } | ||
79 | 83 | ||
80 | memcpy(aiv_list->l, src, len); | 84 | memcpy(aiv_list->l, src, len); |
81 | 85 | ||
@@ -128,57 +132,65 @@ static int gr_gk20a_init_ctx_vars_fw(struct gk20a *g, struct gr_gk20a *gr) | |||
128 | nvgpu_log_info(g, "NETLIST_REGIONID_FECS_UCODE_DATA"); | 132 | nvgpu_log_info(g, "NETLIST_REGIONID_FECS_UCODE_DATA"); |
129 | err = gr_gk20a_alloc_load_netlist_u32(g, | 133 | err = gr_gk20a_alloc_load_netlist_u32(g, |
130 | src, size, &g->gr.ctx_vars.ucode.fecs.data); | 134 | src, size, &g->gr.ctx_vars.ucode.fecs.data); |
131 | if (err) | 135 | if (err) { |
132 | goto clean_up; | 136 | goto clean_up; |
137 | } | ||
133 | break; | 138 | break; |
134 | case NETLIST_REGIONID_FECS_UCODE_INST: | 139 | case NETLIST_REGIONID_FECS_UCODE_INST: |
135 | nvgpu_log_info(g, "NETLIST_REGIONID_FECS_UCODE_INST"); | 140 | nvgpu_log_info(g, "NETLIST_REGIONID_FECS_UCODE_INST"); |
136 | err = gr_gk20a_alloc_load_netlist_u32(g, | 141 | err = gr_gk20a_alloc_load_netlist_u32(g, |
137 | src, size, &g->gr.ctx_vars.ucode.fecs.inst); | 142 | src, size, &g->gr.ctx_vars.ucode.fecs.inst); |
138 | if (err) | 143 | if (err) { |
139 | goto clean_up; | 144 | goto clean_up; |
145 | } | ||
140 | break; | 146 | break; |
141 | case NETLIST_REGIONID_GPCCS_UCODE_DATA: | 147 | case NETLIST_REGIONID_GPCCS_UCODE_DATA: |
142 | nvgpu_log_info(g, "NETLIST_REGIONID_GPCCS_UCODE_DATA"); | 148 | nvgpu_log_info(g, "NETLIST_REGIONID_GPCCS_UCODE_DATA"); |
143 | err = gr_gk20a_alloc_load_netlist_u32(g, | 149 | err = gr_gk20a_alloc_load_netlist_u32(g, |
144 | src, size, &g->gr.ctx_vars.ucode.gpccs.data); | 150 | src, size, &g->gr.ctx_vars.ucode.gpccs.data); |
145 | if (err) | 151 | if (err) { |
146 | goto clean_up; | 152 | goto clean_up; |
153 | } | ||
147 | break; | 154 | break; |
148 | case NETLIST_REGIONID_GPCCS_UCODE_INST: | 155 | case NETLIST_REGIONID_GPCCS_UCODE_INST: |
149 | nvgpu_log_info(g, "NETLIST_REGIONID_GPCCS_UCODE_INST"); | 156 | nvgpu_log_info(g, "NETLIST_REGIONID_GPCCS_UCODE_INST"); |
150 | err = gr_gk20a_alloc_load_netlist_u32(g, | 157 | err = gr_gk20a_alloc_load_netlist_u32(g, |
151 | src, size, &g->gr.ctx_vars.ucode.gpccs.inst); | 158 | src, size, &g->gr.ctx_vars.ucode.gpccs.inst); |
152 | if (err) | 159 | if (err) { |
153 | goto clean_up; | 160 | goto clean_up; |
161 | } | ||
154 | break; | 162 | break; |
155 | case NETLIST_REGIONID_SW_BUNDLE_INIT: | 163 | case NETLIST_REGIONID_SW_BUNDLE_INIT: |
156 | nvgpu_log_info(g, "NETLIST_REGIONID_SW_BUNDLE_INIT"); | 164 | nvgpu_log_info(g, "NETLIST_REGIONID_SW_BUNDLE_INIT"); |
157 | err = gr_gk20a_alloc_load_netlist_av(g, | 165 | err = gr_gk20a_alloc_load_netlist_av(g, |
158 | src, size, &g->gr.ctx_vars.sw_bundle_init); | 166 | src, size, &g->gr.ctx_vars.sw_bundle_init); |
159 | if (err) | 167 | if (err) { |
160 | goto clean_up; | 168 | goto clean_up; |
169 | } | ||
161 | break; | 170 | break; |
162 | case NETLIST_REGIONID_SW_METHOD_INIT: | 171 | case NETLIST_REGIONID_SW_METHOD_INIT: |
163 | nvgpu_log_info(g, "NETLIST_REGIONID_SW_METHOD_INIT"); | 172 | nvgpu_log_info(g, "NETLIST_REGIONID_SW_METHOD_INIT"); |
164 | err = gr_gk20a_alloc_load_netlist_av(g, | 173 | err = gr_gk20a_alloc_load_netlist_av(g, |
165 | src, size, &g->gr.ctx_vars.sw_method_init); | 174 | src, size, &g->gr.ctx_vars.sw_method_init); |
166 | if (err) | 175 | if (err) { |
167 | goto clean_up; | 176 | goto clean_up; |
177 | } | ||
168 | break; | 178 | break; |
169 | case NETLIST_REGIONID_SW_CTX_LOAD: | 179 | case NETLIST_REGIONID_SW_CTX_LOAD: |
170 | nvgpu_log_info(g, "NETLIST_REGIONID_SW_CTX_LOAD"); | 180 | nvgpu_log_info(g, "NETLIST_REGIONID_SW_CTX_LOAD"); |
171 | err = gr_gk20a_alloc_load_netlist_aiv(g, | 181 | err = gr_gk20a_alloc_load_netlist_aiv(g, |
172 | src, size, &g->gr.ctx_vars.sw_ctx_load); | 182 | src, size, &g->gr.ctx_vars.sw_ctx_load); |
173 | if (err) | 183 | if (err) { |
174 | goto clean_up; | 184 | goto clean_up; |
185 | } | ||
175 | break; | 186 | break; |
176 | case NETLIST_REGIONID_SW_NON_CTX_LOAD: | 187 | case NETLIST_REGIONID_SW_NON_CTX_LOAD: |
177 | nvgpu_log_info(g, "NETLIST_REGIONID_SW_NON_CTX_LOAD"); | 188 | nvgpu_log_info(g, "NETLIST_REGIONID_SW_NON_CTX_LOAD"); |
178 | err = gr_gk20a_alloc_load_netlist_av(g, | 189 | err = gr_gk20a_alloc_load_netlist_av(g, |
179 | src, size, &g->gr.ctx_vars.sw_non_ctx_load); | 190 | src, size, &g->gr.ctx_vars.sw_non_ctx_load); |
180 | if (err) | 191 | if (err) { |
181 | goto clean_up; | 192 | goto clean_up; |
193 | } | ||
182 | break; | 194 | break; |
183 | case NETLIST_REGIONID_SWVEIDBUNDLEINIT: | 195 | case NETLIST_REGIONID_SWVEIDBUNDLEINIT: |
184 | nvgpu_log_info(g, | 196 | nvgpu_log_info(g, |
@@ -186,64 +198,73 @@ static int gr_gk20a_init_ctx_vars_fw(struct gk20a *g, struct gr_gk20a *gr) | |||
186 | err = gr_gk20a_alloc_load_netlist_av(g, | 198 | err = gr_gk20a_alloc_load_netlist_av(g, |
187 | src, size, | 199 | src, size, |
188 | &g->gr.ctx_vars.sw_veid_bundle_init); | 200 | &g->gr.ctx_vars.sw_veid_bundle_init); |
189 | if (err) | 201 | if (err) { |
190 | goto clean_up; | 202 | goto clean_up; |
203 | } | ||
191 | break; | 204 | break; |
192 | case NETLIST_REGIONID_CTXREG_SYS: | 205 | case NETLIST_REGIONID_CTXREG_SYS: |
193 | nvgpu_log_info(g, "NETLIST_REGIONID_CTXREG_SYS"); | 206 | nvgpu_log_info(g, "NETLIST_REGIONID_CTXREG_SYS"); |
194 | err = gr_gk20a_alloc_load_netlist_aiv(g, | 207 | err = gr_gk20a_alloc_load_netlist_aiv(g, |
195 | src, size, &g->gr.ctx_vars.ctxsw_regs.sys); | 208 | src, size, &g->gr.ctx_vars.ctxsw_regs.sys); |
196 | if (err) | 209 | if (err) { |
197 | goto clean_up; | 210 | goto clean_up; |
211 | } | ||
198 | break; | 212 | break; |
199 | case NETLIST_REGIONID_CTXREG_GPC: | 213 | case NETLIST_REGIONID_CTXREG_GPC: |
200 | nvgpu_log_info(g, "NETLIST_REGIONID_CTXREG_GPC"); | 214 | nvgpu_log_info(g, "NETLIST_REGIONID_CTXREG_GPC"); |
201 | err = gr_gk20a_alloc_load_netlist_aiv(g, | 215 | err = gr_gk20a_alloc_load_netlist_aiv(g, |
202 | src, size, &g->gr.ctx_vars.ctxsw_regs.gpc); | 216 | src, size, &g->gr.ctx_vars.ctxsw_regs.gpc); |
203 | if (err) | 217 | if (err) { |
204 | goto clean_up; | 218 | goto clean_up; |
219 | } | ||
205 | break; | 220 | break; |
206 | case NETLIST_REGIONID_CTXREG_TPC: | 221 | case NETLIST_REGIONID_CTXREG_TPC: |
207 | nvgpu_log_info(g, "NETLIST_REGIONID_CTXREG_TPC"); | 222 | nvgpu_log_info(g, "NETLIST_REGIONID_CTXREG_TPC"); |
208 | err = gr_gk20a_alloc_load_netlist_aiv(g, | 223 | err = gr_gk20a_alloc_load_netlist_aiv(g, |
209 | src, size, &g->gr.ctx_vars.ctxsw_regs.tpc); | 224 | src, size, &g->gr.ctx_vars.ctxsw_regs.tpc); |
210 | if (err) | 225 | if (err) { |
211 | goto clean_up; | 226 | goto clean_up; |
227 | } | ||
212 | break; | 228 | break; |
213 | case NETLIST_REGIONID_CTXREG_ZCULL_GPC: | 229 | case NETLIST_REGIONID_CTXREG_ZCULL_GPC: |
214 | nvgpu_log_info(g, "NETLIST_REGIONID_CTXREG_ZCULL_GPC"); | 230 | nvgpu_log_info(g, "NETLIST_REGIONID_CTXREG_ZCULL_GPC"); |
215 | err = gr_gk20a_alloc_load_netlist_aiv(g, | 231 | err = gr_gk20a_alloc_load_netlist_aiv(g, |
216 | src, size, &g->gr.ctx_vars.ctxsw_regs.zcull_gpc); | 232 | src, size, &g->gr.ctx_vars.ctxsw_regs.zcull_gpc); |
217 | if (err) | 233 | if (err) { |
218 | goto clean_up; | 234 | goto clean_up; |
235 | } | ||
219 | break; | 236 | break; |
220 | case NETLIST_REGIONID_CTXREG_PPC: | 237 | case NETLIST_REGIONID_CTXREG_PPC: |
221 | nvgpu_log_info(g, "NETLIST_REGIONID_CTXREG_PPC"); | 238 | nvgpu_log_info(g, "NETLIST_REGIONID_CTXREG_PPC"); |
222 | err = gr_gk20a_alloc_load_netlist_aiv(g, | 239 | err = gr_gk20a_alloc_load_netlist_aiv(g, |
223 | src, size, &g->gr.ctx_vars.ctxsw_regs.ppc); | 240 | src, size, &g->gr.ctx_vars.ctxsw_regs.ppc); |
224 | if (err) | 241 | if (err) { |
225 | goto clean_up; | 242 | goto clean_up; |
243 | } | ||
226 | break; | 244 | break; |
227 | case NETLIST_REGIONID_CTXREG_PM_SYS: | 245 | case NETLIST_REGIONID_CTXREG_PM_SYS: |
228 | nvgpu_log_info(g, "NETLIST_REGIONID_CTXREG_PM_SYS"); | 246 | nvgpu_log_info(g, "NETLIST_REGIONID_CTXREG_PM_SYS"); |
229 | err = gr_gk20a_alloc_load_netlist_aiv(g, | 247 | err = gr_gk20a_alloc_load_netlist_aiv(g, |
230 | src, size, &g->gr.ctx_vars.ctxsw_regs.pm_sys); | 248 | src, size, &g->gr.ctx_vars.ctxsw_regs.pm_sys); |
231 | if (err) | 249 | if (err) { |
232 | goto clean_up; | 250 | goto clean_up; |
251 | } | ||
233 | break; | 252 | break; |
234 | case NETLIST_REGIONID_CTXREG_PM_GPC: | 253 | case NETLIST_REGIONID_CTXREG_PM_GPC: |
235 | nvgpu_log_info(g, "NETLIST_REGIONID_CTXREG_PM_GPC"); | 254 | nvgpu_log_info(g, "NETLIST_REGIONID_CTXREG_PM_GPC"); |
236 | err = gr_gk20a_alloc_load_netlist_aiv(g, | 255 | err = gr_gk20a_alloc_load_netlist_aiv(g, |
237 | src, size, &g->gr.ctx_vars.ctxsw_regs.pm_gpc); | 256 | src, size, &g->gr.ctx_vars.ctxsw_regs.pm_gpc); |
238 | if (err) | 257 | if (err) { |
239 | goto clean_up; | 258 | goto clean_up; |
259 | } | ||
240 | break; | 260 | break; |
241 | case NETLIST_REGIONID_CTXREG_PM_TPC: | 261 | case NETLIST_REGIONID_CTXREG_PM_TPC: |
242 | nvgpu_log_info(g, "NETLIST_REGIONID_CTXREG_PM_TPC"); | 262 | nvgpu_log_info(g, "NETLIST_REGIONID_CTXREG_PM_TPC"); |
243 | err = gr_gk20a_alloc_load_netlist_aiv(g, | 263 | err = gr_gk20a_alloc_load_netlist_aiv(g, |
244 | src, size, &g->gr.ctx_vars.ctxsw_regs.pm_tpc); | 264 | src, size, &g->gr.ctx_vars.ctxsw_regs.pm_tpc); |
245 | if (err) | 265 | if (err) { |
246 | goto clean_up; | 266 | goto clean_up; |
267 | } | ||
247 | break; | 268 | break; |
248 | case NETLIST_REGIONID_BUFFER_SIZE: | 269 | case NETLIST_REGIONID_BUFFER_SIZE: |
249 | g->gr.ctx_vars.buffer_size = *src; | 270 | g->gr.ctx_vars.buffer_size = *src; |
@@ -269,108 +290,123 @@ static int gr_gk20a_init_ctx_vars_fw(struct gk20a *g, struct gr_gk20a *gr) | |||
269 | nvgpu_log_info(g, "NETLIST_REGIONID_CTXREG_PMPPC"); | 290 | nvgpu_log_info(g, "NETLIST_REGIONID_CTXREG_PMPPC"); |
270 | err = gr_gk20a_alloc_load_netlist_aiv(g, | 291 | err = gr_gk20a_alloc_load_netlist_aiv(g, |
271 | src, size, &g->gr.ctx_vars.ctxsw_regs.pm_ppc); | 292 | src, size, &g->gr.ctx_vars.ctxsw_regs.pm_ppc); |
272 | if (err) | 293 | if (err) { |
273 | goto clean_up; | 294 | goto clean_up; |
295 | } | ||
274 | break; | 296 | break; |
275 | case NETLIST_REGIONID_NVPERF_CTXREG_SYS: | 297 | case NETLIST_REGIONID_NVPERF_CTXREG_SYS: |
276 | nvgpu_log_info(g, "NETLIST_REGIONID_NVPERF_CTXREG_SYS"); | 298 | nvgpu_log_info(g, "NETLIST_REGIONID_NVPERF_CTXREG_SYS"); |
277 | err = gr_gk20a_alloc_load_netlist_aiv(g, | 299 | err = gr_gk20a_alloc_load_netlist_aiv(g, |
278 | src, size, &g->gr.ctx_vars.ctxsw_regs.perf_sys); | 300 | src, size, &g->gr.ctx_vars.ctxsw_regs.perf_sys); |
279 | if (err) | 301 | if (err) { |
280 | goto clean_up; | 302 | goto clean_up; |
303 | } | ||
281 | break; | 304 | break; |
282 | case NETLIST_REGIONID_NVPERF_FBP_CTXREGS: | 305 | case NETLIST_REGIONID_NVPERF_FBP_CTXREGS: |
283 | nvgpu_log_info(g, "NETLIST_REGIONID_NVPERF_FBP_CTXREGS"); | 306 | nvgpu_log_info(g, "NETLIST_REGIONID_NVPERF_FBP_CTXREGS"); |
284 | err = gr_gk20a_alloc_load_netlist_aiv(g, | 307 | err = gr_gk20a_alloc_load_netlist_aiv(g, |
285 | src, size, &g->gr.ctx_vars.ctxsw_regs.fbp); | 308 | src, size, &g->gr.ctx_vars.ctxsw_regs.fbp); |
286 | if (err) | 309 | if (err) { |
287 | goto clean_up; | 310 | goto clean_up; |
311 | } | ||
288 | break; | 312 | break; |
289 | case NETLIST_REGIONID_NVPERF_CTXREG_GPC: | 313 | case NETLIST_REGIONID_NVPERF_CTXREG_GPC: |
290 | nvgpu_log_info(g, "NETLIST_REGIONID_NVPERF_CTXREG_GPC"); | 314 | nvgpu_log_info(g, "NETLIST_REGIONID_NVPERF_CTXREG_GPC"); |
291 | err = gr_gk20a_alloc_load_netlist_aiv(g, | 315 | err = gr_gk20a_alloc_load_netlist_aiv(g, |
292 | src, size, &g->gr.ctx_vars.ctxsw_regs.perf_gpc); | 316 | src, size, &g->gr.ctx_vars.ctxsw_regs.perf_gpc); |
293 | if (err) | 317 | if (err) { |
294 | goto clean_up; | 318 | goto clean_up; |
319 | } | ||
295 | break; | 320 | break; |
296 | case NETLIST_REGIONID_NVPERF_FBP_ROUTER: | 321 | case NETLIST_REGIONID_NVPERF_FBP_ROUTER: |
297 | nvgpu_log_info(g, "NETLIST_REGIONID_NVPERF_FBP_ROUTER"); | 322 | nvgpu_log_info(g, "NETLIST_REGIONID_NVPERF_FBP_ROUTER"); |
298 | err = gr_gk20a_alloc_load_netlist_aiv(g, | 323 | err = gr_gk20a_alloc_load_netlist_aiv(g, |
299 | src, size, &g->gr.ctx_vars.ctxsw_regs.fbp_router); | 324 | src, size, &g->gr.ctx_vars.ctxsw_regs.fbp_router); |
300 | if (err) | 325 | if (err) { |
301 | goto clean_up; | 326 | goto clean_up; |
327 | } | ||
302 | break; | 328 | break; |
303 | case NETLIST_REGIONID_NVPERF_GPC_ROUTER: | 329 | case NETLIST_REGIONID_NVPERF_GPC_ROUTER: |
304 | nvgpu_log_info(g, "NETLIST_REGIONID_NVPERF_GPC_ROUTER"); | 330 | nvgpu_log_info(g, "NETLIST_REGIONID_NVPERF_GPC_ROUTER"); |
305 | err = gr_gk20a_alloc_load_netlist_aiv(g, | 331 | err = gr_gk20a_alloc_load_netlist_aiv(g, |
306 | src, size, &g->gr.ctx_vars.ctxsw_regs.gpc_router); | 332 | src, size, &g->gr.ctx_vars.ctxsw_regs.gpc_router); |
307 | if (err) | 333 | if (err) { |
308 | goto clean_up; | 334 | goto clean_up; |
335 | } | ||
309 | break; | 336 | break; |
310 | case NETLIST_REGIONID_CTXREG_PMLTC: | 337 | case NETLIST_REGIONID_CTXREG_PMLTC: |
311 | nvgpu_log_info(g, "NETLIST_REGIONID_CTXREG_PMLTC"); | 338 | nvgpu_log_info(g, "NETLIST_REGIONID_CTXREG_PMLTC"); |
312 | err = gr_gk20a_alloc_load_netlist_aiv(g, | 339 | err = gr_gk20a_alloc_load_netlist_aiv(g, |
313 | src, size, &g->gr.ctx_vars.ctxsw_regs.pm_ltc); | 340 | src, size, &g->gr.ctx_vars.ctxsw_regs.pm_ltc); |
314 | if (err) | 341 | if (err) { |
315 | goto clean_up; | 342 | goto clean_up; |
343 | } | ||
316 | break; | 344 | break; |
317 | case NETLIST_REGIONID_CTXREG_PMFBPA: | 345 | case NETLIST_REGIONID_CTXREG_PMFBPA: |
318 | nvgpu_log_info(g, "NETLIST_REGIONID_CTXREG_PMFBPA"); | 346 | nvgpu_log_info(g, "NETLIST_REGIONID_CTXREG_PMFBPA"); |
319 | err = gr_gk20a_alloc_load_netlist_aiv(g, | 347 | err = gr_gk20a_alloc_load_netlist_aiv(g, |
320 | src, size, &g->gr.ctx_vars.ctxsw_regs.pm_fbpa); | 348 | src, size, &g->gr.ctx_vars.ctxsw_regs.pm_fbpa); |
321 | if (err) | 349 | if (err) { |
322 | goto clean_up; | 350 | goto clean_up; |
351 | } | ||
323 | break; | 352 | break; |
324 | case NETLIST_REGIONID_NVPERF_SYS_ROUTER: | 353 | case NETLIST_REGIONID_NVPERF_SYS_ROUTER: |
325 | nvgpu_log_info(g, "NETLIST_REGIONID_NVPERF_SYS_ROUTER"); | 354 | nvgpu_log_info(g, "NETLIST_REGIONID_NVPERF_SYS_ROUTER"); |
326 | err = gr_gk20a_alloc_load_netlist_aiv(g, | 355 | err = gr_gk20a_alloc_load_netlist_aiv(g, |
327 | src, size, &g->gr.ctx_vars.ctxsw_regs.perf_sys_router); | 356 | src, size, &g->gr.ctx_vars.ctxsw_regs.perf_sys_router); |
328 | if (err) | 357 | if (err) { |
329 | goto clean_up; | 358 | goto clean_up; |
359 | } | ||
330 | break; | 360 | break; |
331 | case NETLIST_REGIONID_NVPERF_PMA: | 361 | case NETLIST_REGIONID_NVPERF_PMA: |
332 | nvgpu_log_info(g, "NETLIST_REGIONID_NVPERF_PMA"); | 362 | nvgpu_log_info(g, "NETLIST_REGIONID_NVPERF_PMA"); |
333 | err = gr_gk20a_alloc_load_netlist_aiv(g, | 363 | err = gr_gk20a_alloc_load_netlist_aiv(g, |
334 | src, size, &g->gr.ctx_vars.ctxsw_regs.perf_pma); | 364 | src, size, &g->gr.ctx_vars.ctxsw_regs.perf_pma); |
335 | if (err) | 365 | if (err) { |
336 | goto clean_up; | 366 | goto clean_up; |
367 | } | ||
337 | break; | 368 | break; |
338 | case NETLIST_REGIONID_CTXREG_PMROP: | 369 | case NETLIST_REGIONID_CTXREG_PMROP: |
339 | nvgpu_log_info(g, "NETLIST_REGIONID_CTXREG_PMROP"); | 370 | nvgpu_log_info(g, "NETLIST_REGIONID_CTXREG_PMROP"); |
340 | err = gr_gk20a_alloc_load_netlist_aiv(g, | 371 | err = gr_gk20a_alloc_load_netlist_aiv(g, |
341 | src, size, &g->gr.ctx_vars.ctxsw_regs.pm_rop); | 372 | src, size, &g->gr.ctx_vars.ctxsw_regs.pm_rop); |
342 | if (err) | 373 | if (err) { |
343 | goto clean_up; | 374 | goto clean_up; |
375 | } | ||
344 | break; | 376 | break; |
345 | case NETLIST_REGIONID_CTXREG_PMUCGPC: | 377 | case NETLIST_REGIONID_CTXREG_PMUCGPC: |
346 | nvgpu_log_info(g, "NETLIST_REGIONID_CTXREG_PMUCGPC"); | 378 | nvgpu_log_info(g, "NETLIST_REGIONID_CTXREG_PMUCGPC"); |
347 | err = gr_gk20a_alloc_load_netlist_aiv(g, | 379 | err = gr_gk20a_alloc_load_netlist_aiv(g, |
348 | src, size, &g->gr.ctx_vars.ctxsw_regs.pm_ucgpc); | 380 | src, size, &g->gr.ctx_vars.ctxsw_regs.pm_ucgpc); |
349 | if (err) | 381 | if (err) { |
350 | goto clean_up; | 382 | goto clean_up; |
383 | } | ||
351 | break; | 384 | break; |
352 | case NETLIST_REGIONID_CTXREG_ETPC: | 385 | case NETLIST_REGIONID_CTXREG_ETPC: |
353 | nvgpu_log_info(g, "NETLIST_REGIONID_CTXREG_ETPC"); | 386 | nvgpu_log_info(g, "NETLIST_REGIONID_CTXREG_ETPC"); |
354 | err = gr_gk20a_alloc_load_netlist_aiv(g, | 387 | err = gr_gk20a_alloc_load_netlist_aiv(g, |
355 | src, size, &g->gr.ctx_vars.ctxsw_regs.etpc); | 388 | src, size, &g->gr.ctx_vars.ctxsw_regs.etpc); |
356 | if (err) | 389 | if (err) { |
357 | goto clean_up; | 390 | goto clean_up; |
391 | } | ||
358 | break; | 392 | break; |
359 | case NETLIST_REGIONID_SW_BUNDLE64_INIT: | 393 | case NETLIST_REGIONID_SW_BUNDLE64_INIT: |
360 | nvgpu_log_info(g, "NETLIST_REGIONID_SW_BUNDLE64_INIT"); | 394 | nvgpu_log_info(g, "NETLIST_REGIONID_SW_BUNDLE64_INIT"); |
361 | err = gr_gk20a_alloc_load_netlist_av64(g, | 395 | err = gr_gk20a_alloc_load_netlist_av64(g, |
362 | src, size, | 396 | src, size, |
363 | &g->gr.ctx_vars.sw_bundle64_init); | 397 | &g->gr.ctx_vars.sw_bundle64_init); |
364 | if (err) | 398 | if (err) { |
365 | goto clean_up; | 399 | goto clean_up; |
400 | } | ||
366 | break; | 401 | break; |
367 | case NETLIST_REGIONID_NVPERF_PMCAU: | 402 | case NETLIST_REGIONID_NVPERF_PMCAU: |
368 | nvgpu_log_info(g, "NETLIST_REGIONID_NVPERF_PMCAU"); | 403 | nvgpu_log_info(g, "NETLIST_REGIONID_NVPERF_PMCAU"); |
369 | err = gr_gk20a_alloc_load_netlist_aiv(g, | 404 | err = gr_gk20a_alloc_load_netlist_aiv(g, |
370 | src, size, | 405 | src, size, |
371 | &g->gr.ctx_vars.ctxsw_regs.pm_cau); | 406 | &g->gr.ctx_vars.ctxsw_regs.pm_cau); |
372 | if (err) | 407 | if (err) { |
373 | goto clean_up; | 408 | goto clean_up; |
409 | } | ||
374 | break; | 410 | break; |
375 | 411 | ||
376 | default: | 412 | default: |
@@ -442,8 +478,9 @@ done: | |||
442 | 478 | ||
443 | int gr_gk20a_init_ctx_vars(struct gk20a *g, struct gr_gk20a *gr) | 479 | int gr_gk20a_init_ctx_vars(struct gk20a *g, struct gr_gk20a *gr) |
444 | { | 480 | { |
445 | if (nvgpu_is_enabled(g, NVGPU_IS_FMODEL)) | 481 | if (nvgpu_is_enabled(g, NVGPU_IS_FMODEL)) { |
446 | return gr_gk20a_init_ctx_vars_sim(g, gr); | 482 | return gr_gk20a_init_ctx_vars_sim(g, gr); |
447 | else | 483 | } else { |
448 | return gr_gk20a_init_ctx_vars_fw(g, gr); | 484 | return gr_gk20a_init_ctx_vars_fw(g, gr); |
485 | } | ||
449 | } | 486 | } |