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authorMahantesh Kumbar <mkumbar@nvidia.com>2017-04-21 07:19:12 -0400
committermobile promotions <svcmobile_promotions@nvidia.com>2017-05-03 02:36:07 -0400
commitf30a685f48768b784fb92652d945f43a289e13c4 (patch)
tree85f262b0f58901c9d3fe173880c2f1fbd51b6c59 /drivers/gpu/nvgpu/gk20a/gk20a.h
parent0a141c90af622bf2981fe7abbee9b1657ff1eea6 (diff)
gpu: nvgpu: interface layer for falcon
- struct nvgpu_falcon to hold properties of falcon controller - falcon controller interface layer which establish access to required falcon controller HAL based on struct nvgpu_falcon member flcn_id & flcn_base parameter. - each falcon nvgpu_falcon struct initialized during init with id, base-address along with other properties at HAL. - Added defines related to flacon controller. Change-Id: Ia7777c01ecc542150ddd72f8603b7b4475522b58 Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com> Reviewed-on: http://git-master/r/1467523 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gk20a/gk20a.h')
-rw-r--r--drivers/gpu/nvgpu/gk20a/gk20a.h8
1 files changed, 8 insertions, 0 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.h b/drivers/gpu/nvgpu/gk20a/gk20a.h
index 71ff8d3e..74e2c688 100644
--- a/drivers/gpu/nvgpu/gk20a/gk20a.h
+++ b/drivers/gpu/nvgpu/gk20a/gk20a.h
@@ -46,6 +46,7 @@ struct dbg_profiler_object_data;
46#include <nvgpu/pramin.h> 46#include <nvgpu/pramin.h>
47#include <nvgpu/acr/nvgpu_acr.h> 47#include <nvgpu/acr/nvgpu_acr.h>
48#include <nvgpu/kref.h> 48#include <nvgpu/kref.h>
49#include <nvgpu/falcon.h>
49 50
50#include "clk_gk20a.h" 51#include "clk_gk20a.h"
51#include "ce2_gk20a.h" 52#include "ce2_gk20a.h"
@@ -869,6 +870,9 @@ struct gpu_ops {
869 void (*enable_shadow_rom)(struct gk20a *g); 870 void (*enable_shadow_rom)(struct gk20a *g);
870 void (*disable_shadow_rom)(struct gk20a *g); 871 void (*disable_shadow_rom)(struct gk20a *g);
871 } xve; 872 } xve;
873 struct {
874 void (*falcon_hal_sw_init)(struct nvgpu_falcon *flcn);
875 } falcon;
872}; 876};
873 877
874struct nvgpu_bios_ucode { 878struct nvgpu_bios_ucode {
@@ -944,6 +948,10 @@ struct gk20a {
944 948
945 struct rw_semaphore busy_lock; 949 struct rw_semaphore busy_lock;
946 950
951 struct nvgpu_falcon pmu_flcn;
952 struct nvgpu_falcon sec2_flcn;
953 struct nvgpu_falcon fecs_flcn;
954 struct nvgpu_falcon gpccs_flcn;
947 struct clk_gk20a clk; 955 struct clk_gk20a clk;
948 struct fifo_gk20a fifo; 956 struct fifo_gk20a fifo;
949 struct gr_gk20a gr; 957 struct gr_gk20a gr;