diff options
author | Terje Bergstrom <tbergstrom@nvidia.com> | 2016-03-29 19:02:34 -0400 |
---|---|---|
committer | Terje Bergstrom <tbergstrom@nvidia.com> | 2016-04-08 12:42:41 -0400 |
commit | e8bac374c0ed24f05bf389e1e8b5aca47f61bd3a (patch) | |
tree | 36b6e111f8706c0560ee552bc9d6e15b87fc9621 /drivers/gpu/nvgpu/gk20a/gk20a.h | |
parent | 2382a8433fddaee3baecff6ae941944850787ab7 (diff) |
gpu: nvgpu: Use device instead of platform_device
Use struct device instead of struct platform_device wherever
possible. This allows adding other bus types later.
Change-Id: I1657287a68d85a542cdbdd8a00d1902c3d6e00ed
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1120466
Diffstat (limited to 'drivers/gpu/nvgpu/gk20a/gk20a.h')
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/gk20a.h | 44 |
1 files changed, 25 insertions, 19 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.h b/drivers/gpu/nvgpu/gk20a/gk20a.h index 273eeaf4..9d8dc5f7 100644 --- a/drivers/gpu/nvgpu/gk20a/gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/gk20a.h | |||
@@ -18,7 +18,6 @@ | |||
18 | #ifndef GK20A_H | 18 | #ifndef GK20A_H |
19 | #define GK20A_H | 19 | #define GK20A_H |
20 | 20 | ||
21 | |||
22 | struct gk20a; | 21 | struct gk20a; |
23 | struct fifo_gk20a; | 22 | struct fifo_gk20a; |
24 | struct channel_gk20a; | 23 | struct channel_gk20a; |
@@ -206,7 +205,7 @@ struct gpu_ops { | |||
206 | bool *post_event, struct channel_gk20a *fault_ch); | 205 | bool *post_event, struct channel_gk20a *fault_ch); |
207 | int (*handle_tex_exception)(struct gk20a *g, u32 gpc, u32 tpc, | 206 | int (*handle_tex_exception)(struct gk20a *g, u32 gpc, u32 tpc, |
208 | bool *post_event); | 207 | bool *post_event); |
209 | void (*create_gr_sysfs)(struct platform_device *dev); | 208 | void (*create_gr_sysfs)(struct device *dev); |
210 | u32 (*get_lrf_tex_ltc_dram_override)(struct gk20a *g); | 209 | u32 (*get_lrf_tex_ltc_dram_override)(struct gk20a *g); |
211 | } gr; | 210 | } gr; |
212 | const char *name; | 211 | const char *name; |
@@ -517,7 +516,7 @@ struct gpu_ops { | |||
517 | }; | 516 | }; |
518 | 517 | ||
519 | struct gk20a { | 518 | struct gk20a { |
520 | struct platform_device *dev; | 519 | struct device *dev; |
521 | struct platform_device *host1x_dev; | 520 | struct platform_device *host1x_dev; |
522 | 521 | ||
523 | struct resource *reg_mem; | 522 | struct resource *reg_mem; |
@@ -602,7 +601,7 @@ struct gk20a { | |||
602 | */ | 601 | */ |
603 | u64 separate_fixed_allocs; | 602 | u64 separate_fixed_allocs; |
604 | 603 | ||
605 | void (*remove_support)(struct platform_device *); | 604 | void (*remove_support)(struct device *); |
606 | 605 | ||
607 | u64 pg_ingating_time_us; | 606 | u64 pg_ingating_time_us; |
608 | u64 pg_ungating_time_us; | 607 | u64 pg_ungating_time_us; |
@@ -648,7 +647,6 @@ struct gk20a { | |||
648 | int client_refcount; /* open channels and ctrl nodes */ | 647 | int client_refcount; /* open channels and ctrl nodes */ |
649 | 648 | ||
650 | dev_t cdev_region; | 649 | dev_t cdev_region; |
651 | struct class *class; | ||
652 | 650 | ||
653 | struct gpu_ops ops; | 651 | struct gpu_ops ops; |
654 | 652 | ||
@@ -685,7 +683,7 @@ static inline unsigned long gk20a_get_gr_idle_timeout(struct gk20a *g) | |||
685 | g->gr_idle_timeout_default : MAX_SCHEDULE_TIMEOUT; | 683 | g->gr_idle_timeout_default : MAX_SCHEDULE_TIMEOUT; |
686 | } | 684 | } |
687 | 685 | ||
688 | static inline struct gk20a *get_gk20a(struct platform_device *dev) | 686 | static inline struct gk20a *get_gk20a(struct device *dev) |
689 | { | 687 | { |
690 | return gk20a_get_platform(dev)->g; | 688 | return gk20a_get_platform(dev)->g; |
691 | } | 689 | } |
@@ -880,7 +878,11 @@ static inline u32 gk20a_bar1_readl(struct gk20a *g, u32 b) | |||
880 | /* convenience */ | 878 | /* convenience */ |
881 | static inline struct device *dev_from_gk20a(struct gk20a *g) | 879 | static inline struct device *dev_from_gk20a(struct gk20a *g) |
882 | { | 880 | { |
883 | return &g->dev->dev; | 881 | return g->dev; |
882 | } | ||
883 | static inline struct gk20a *gk20a_from_dev(struct device *dev) | ||
884 | { | ||
885 | return ((struct gk20a_platform *)dev_get_drvdata(dev))->g; | ||
884 | } | 886 | } |
885 | static inline struct gk20a *gk20a_from_as(struct gk20a_as *as) | 887 | static inline struct gk20a *gk20a_from_as(struct gk20a_as *as) |
886 | { | 888 | { |
@@ -927,14 +929,14 @@ enum { | |||
927 | KEPLER_CHANNEL_GPFIFO_C = 0xA26F, | 929 | KEPLER_CHANNEL_GPFIFO_C = 0xA26F, |
928 | }; | 930 | }; |
929 | 931 | ||
930 | static inline bool gk20a_gpu_is_virtual(struct platform_device *dev) | 932 | static inline bool gk20a_gpu_is_virtual(struct device *dev) |
931 | { | 933 | { |
932 | struct gk20a_platform *platform = gk20a_get_platform(dev); | 934 | struct gk20a_platform *platform = dev_get_drvdata(dev); |
933 | 935 | ||
934 | return platform->virtual_dev; | 936 | return platform->virtual_dev; |
935 | } | 937 | } |
936 | 938 | ||
937 | static inline int support_gk20a_pmu(struct platform_device *dev) | 939 | static inline int support_gk20a_pmu(struct device *dev) |
938 | { | 940 | { |
939 | if (IS_ENABLED(CONFIG_GK20A_PMU)) { | 941 | if (IS_ENABLED(CONFIG_GK20A_PMU)) { |
940 | /* gPMU is not supported for vgpu */ | 942 | /* gPMU is not supported for vgpu */ |
@@ -944,23 +946,23 @@ static inline int support_gk20a_pmu(struct platform_device *dev) | |||
944 | return 0; | 946 | return 0; |
945 | } | 947 | } |
946 | 948 | ||
947 | void gk20a_create_sysfs(struct platform_device *dev); | 949 | void gk20a_create_sysfs(struct device *dev); |
948 | void gk20a_remove_sysfs(struct device *dev); | 950 | void gk20a_remove_sysfs(struct device *dev); |
949 | 951 | ||
950 | #define GK20A_BAR0_IORESOURCE_MEM 0 | 952 | #define GK20A_BAR0_IORESOURCE_MEM 0 |
951 | #define GK20A_BAR1_IORESOURCE_MEM 1 | 953 | #define GK20A_BAR1_IORESOURCE_MEM 1 |
952 | #define GK20A_SIM_IORESOURCE_MEM 2 | 954 | #define GK20A_SIM_IORESOURCE_MEM 2 |
953 | 955 | ||
954 | void gk20a_busy_noresume(struct platform_device *pdev); | 956 | void gk20a_busy_noresume(struct device *dev); |
955 | int __must_check gk20a_busy(struct platform_device *pdev); | 957 | int __must_check gk20a_busy(struct device *dev); |
956 | void gk20a_idle(struct platform_device *pdev); | 958 | void gk20a_idle(struct device *dev); |
957 | void gk20a_disable(struct gk20a *g, u32 units); | 959 | void gk20a_disable(struct gk20a *g, u32 units); |
958 | void gk20a_enable(struct gk20a *g, u32 units); | 960 | void gk20a_enable(struct gk20a *g, u32 units); |
959 | void gk20a_reset(struct gk20a *g, u32 units); | 961 | void gk20a_reset(struct gk20a *g, u32 units); |
960 | int gk20a_do_idle(void); | 962 | int gk20a_do_idle(void); |
961 | int gk20a_do_unidle(void); | 963 | int gk20a_do_unidle(void); |
962 | int __gk20a_do_idle(struct platform_device *pdev, bool force_reset); | 964 | int __gk20a_do_idle(struct device *dev, bool force_reset); |
963 | int __gk20a_do_unidle(struct platform_device *pdev); | 965 | int __gk20a_do_unidle(struct device *dev); |
964 | 966 | ||
965 | const struct firmware * | 967 | const struct firmware * |
966 | gk20a_request_firmware(struct gk20a *g, const char *fw_name); | 968 | gk20a_request_firmware(struct gk20a *g, const char *fw_name); |
@@ -981,10 +983,10 @@ int gk20a_init_gpu_characteristics(struct gk20a *g); | |||
981 | 983 | ||
982 | void gk20a_pbus_isr(struct gk20a *g); | 984 | void gk20a_pbus_isr(struct gk20a *g); |
983 | 985 | ||
984 | int gk20a_user_init(struct platform_device *dev); | 986 | int gk20a_user_init(struct device *dev, const char *interface_name); |
985 | void gk20a_user_deinit(struct platform_device *dev); | 987 | void gk20a_user_deinit(struct device *dev); |
986 | 988 | ||
987 | extern void gk20a_debug_dump_device(struct platform_device *pdev); | 989 | void gk20a_debug_dump_device(void *dev); |
988 | 990 | ||
989 | static inline u32 ptimer_scalingfactor10x(u32 ptimer_src_freq) | 991 | static inline u32 ptimer_scalingfactor10x(u32 ptimer_src_freq) |
990 | { | 992 | { |
@@ -999,4 +1001,8 @@ static inline u32 scale_ptimer(u32 timeout , u32 scale10x) | |||
999 | } | 1001 | } |
1000 | 1002 | ||
1001 | u64 gk20a_read_ptimer(struct gk20a *g); | 1003 | u64 gk20a_read_ptimer(struct gk20a *g); |
1004 | extern struct class nvgpu_class; | ||
1005 | |||
1006 | #define INTERFACE_NAME "nvhost%s-gpu" | ||
1007 | |||
1002 | #endif /* GK20A_H */ | 1008 | #endif /* GK20A_H */ |