summaryrefslogtreecommitdiffstats
path: root/drivers/gpu/nvgpu/gk20a/gk20a.h
diff options
context:
space:
mode:
authorTerje Bergstrom <tbergstrom@nvidia.com>2018-05-24 16:00:14 -0400
committerTejal Kudav <tkudav@nvidia.com>2018-06-14 09:44:07 -0400
commitdbb8792baf2142626728abf909fb201144b9b56a (patch)
tree6ca5edfeb3f757bef86aaf6d6ebbf12b2c2aa748 /drivers/gpu/nvgpu/gk20a/gk20a.h
parented65f1f26e2d0ca4a491215297b61d25b0c1493b (diff)
gpu: nvgpu: Move setting of BAR0_WINDOW to bus
Move setting of BAR0_WINDOW to bus HAL. Also moves the usage of spinlock to common code so that pramin_gk20a.[ch] can be deleted. JIRA NVGPU-588 Change-Id: I3ceabc56016711b2c93f31fedf07daa778a4873a Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1730890 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gk20a/gk20a.h')
-rw-r--r--drivers/gpu/nvgpu/gk20a/gk20a.h6
1 files changed, 3 insertions, 3 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.h b/drivers/gpu/nvgpu/gk20a/gk20a.h
index 2d304cff..f6b0b362 100644
--- a/drivers/gpu/nvgpu/gk20a/gk20a.h
+++ b/drivers/gpu/nvgpu/gk20a/gk20a.h
@@ -925,9 +925,6 @@ struct gpu_ops {
925 struct gr_ctx_buffer_desc *desc, 925 struct gr_ctx_buffer_desc *desc,
926 size_t size); 926 size_t size);
927 struct { 927 struct {
928 u32 (*enter)(struct gk20a *g, struct nvgpu_mem *mem,
929 struct nvgpu_sgt *sgt, struct nvgpu_sgl *sgl,
930 u32 w);
931 void (*exit)(struct gk20a *g, struct nvgpu_mem *mem, 928 void (*exit)(struct gk20a *g, struct nvgpu_mem *mem,
932 struct nvgpu_sgl *sgl); 929 struct nvgpu_sgl *sgl);
933 u32 (*data032_r)(u32 i); 930 u32 (*data032_r)(u32 i);
@@ -1128,6 +1125,9 @@ struct gpu_ops {
1128 u32 source_id, u32 count, 1125 u32 source_id, u32 count,
1129 struct nvgpu_cpu_time_correlation_sample *); 1126 struct nvgpu_cpu_time_correlation_sample *);
1130 int (*bar1_bind)(struct gk20a *g, struct nvgpu_mem *bar1_inst); 1127 int (*bar1_bind)(struct gk20a *g, struct nvgpu_mem *bar1_inst);
1128 u32 (*set_bar0_window)(struct gk20a *g, struct nvgpu_mem *mem,
1129 struct nvgpu_sgt *sgt, struct nvgpu_sgl *sgl,
1130 u32 w);
1131 } bus; 1131 } bus;
1132 1132
1133 struct { 1133 struct {