gpu: nvgpu: MISRA 10.3-Conversions to/from an enum

Fix violations where the conversion is from a non-enum type to enum
type or vice-versa.

JIRA NVGPU-659

Change-Id: I45f43c907b810cc86b2a4480809d0c6757ed3486
Signed-off-by: Amulya <Amurthyreddy@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1802322
GVS: Gerrit_Virtual_Submit
Tested-by: Amulya Murthyreddy <amurthyreddy@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: Adeel Raza <araza@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

1 files changed, 3 insertions, 2 deletions

diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.h b/drivers/gpu/nvgpu/gk20a/gk20a.h
index febd7e0c..262dbb2c 100644
--- a/drivers/gpu/nvgpu/gk20a/gk20a.h
+++ b/drivers/gpu/nvgpu/gk20a/gk20a.h
@@ -139,6 +139,7 @@ enum gk20a_cbc_op {
 enum nvgpu_unit;
 
 enum nvgpu_flush_op;
+enum gk20a_mem_rw_flag;
 
 struct _resmgr_context;
 struct nvgpu_gpfifo_entry;
@@ -924,7 +925,7 @@ struct gpu_ops {
                                 u8 kind_v,
                                 u32 ctag_offset,
                                 u32 flags,
-                                int rw_flag,
+                                enum gk20a_mem_rw_flag rw_flag,
                                 bool clear_ctags,
                                 bool sparse,
                                 bool priv,
@@ -935,7 +936,7 @@ struct gpu_ops {
                                 u64 size,
                                 int pgsz_idx,
                                 bool va_allocated,
-                                int rw_flag,
+                                enum gk20a_mem_rw_flag rw_flag,
                                 bool sparse,
                                 struct vm_gk20a_mapping_batch *batch);
                 int (*vm_bind_channel)(struct vm_gk20a *vm,