gpu: nvgpu: Allow enabling/disabling MC interrupt

Added method to enable/disable MC interrupt by unit

Bug 200064127

Change-Id: I89e794d5b69a2a93642e2df437d6744bf595f021
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: http://git-master/r/661211
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>

1 files changed, 6 insertions, 0 deletions

diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.h b/drivers/gpu/nvgpu/gk20a/gk20a.h
index 75c6ef89..4333cd20 100644
--- a/drivers/gpu/nvgpu/gk20a/gk20a.h
+++ b/drivers/gpu/nvgpu/gk20a/gk20a.h
@@ -61,6 +61,9 @@ enum gk20a_cbc_op {
         gk20a_cbc_op_invalidate,
 };
 
+#define MC_INTR_UNIT_DISABLE    false
+#define MC_INTR_UNIT_ENABLE             true
+
 struct gpu_ops {
         struct {
                 int (*determine_L2_size_bytes)(struct gk20a *gk20a);
@@ -360,10 +363,13 @@ struct gpu_ops {
         } regops;
         struct {
                 void (*intr_enable)(struct gk20a *g);
+                void (*intr_unit_config)(struct gk20a *g,
+                                bool enable, bool is_stalling, u32 unit);
                 irqreturn_t (*isr_stall)(struct gk20a *g);
                 irqreturn_t (*isr_nonstall)(struct gk20a *g);
                 irqreturn_t (*isr_thread_stall)(struct gk20a *g);
                 irqreturn_t (*isr_thread_nonstall)(struct gk20a *g);
+                u32 intr_mask_restore[4];
         } mc;
 };