gpu: nvgpu: HAL to query LPWR feature support

HAL to query LPWR feautre's RPPG/MSCG support
based on current pstate configured.

JIRA DNVGPU-71

Change-Id: I58a34c6dca68e3eb76e222bd781578bf682eac34
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: http://git-master/r/1283916
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>

1 files changed, 2 insertions, 0 deletions

diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.h b/drivers/gpu/nvgpu/gk20a/gk20a.h
index ff8ffc4f..5e2344cf 100644
--- a/drivers/gpu/nvgpu/gk20a/gk20a.h
+++ b/drivers/gpu/nvgpu/gk20a/gk20a.h
@@ -610,6 +610,8 @@ struct gpu_ops {
                 u32 (*pmu_pg_supported_engines_list)(struct gk20a *g);
                 u32 (*pmu_pg_engines_feature_list)(struct gk20a *g,
                         u32 pg_engine_id);
+                bool (*pmu_is_lpwr_feature_supported)(struct gk20a *g,
+                        u32 feature_id);
                 int (*pmu_lpwr_enable_pg)(struct gk20a *g, bool pstate_lock);
                 int (*pmu_lpwr_disable_pg)(struct gk20a *g, bool pstate_lock);
                 u32 (*pmu_pg_param_post_init)(struct gk20a *g);