gpu: nvgpu: initialize czf_bypass only once

We right now initialize czf_bypass value in gr_gp10b_init_preemption_state()
which is run at every rail ungate
And that results in any user specified value through sysfs getting lost after
railgate

To fix this, move initialization of czf_bypass to gk20a_init_gr_setup_sw() so
that it gets initialized only once
Add new HAL g->ops.gr.init_czf_bypass to initialize same and define it for
gp10b/gp106/vgpu-gp10b

Bug 2008262

Change-Id: I80a38ef527c86e32c6d64d0626b867239db9ea51
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1585224
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

1 files changed, 1 insertions, 0 deletions

diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.h b/drivers/gpu/nvgpu/gk20a/gk20a.h
index 9c09e85f..4f3b34b8 100644
--- a/drivers/gpu/nvgpu/gk20a/gk20a.h
+++ b/drivers/gpu/nvgpu/gk20a/gk20a.h
@@ -414,6 +414,7 @@ struct gpu_ops {
                 u32 (*tpc_enabled_exceptions)(struct gk20a *g);
                 int (*set_czf_bypass)(struct gk20a *g,
                                       struct channel_gk20a *ch);
+                void (*init_czf_bypass)(struct gk20a *g);
                 bool (*sm_debugger_attached)(struct gk20a *g);
                 void (*suspend_single_sm)(struct gk20a *g,
                                 u32 gpc, u32 tpc, u32 sm,