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authorThomas Fleury <tfleury@nvidia.com>2017-06-21 14:13:22 -0400
committermobile promotions <svcmobile_promotions@nvidia.com>2017-06-30 11:46:34 -0400
commitc12eb17340c90086f378c239da3d9015e7878f0c (patch)
treede0d8d3886bbc11e4b8524bda0d35de3e4e8638d /drivers/gpu/nvgpu/gk20a/gk20a.h
parenta89c3876c71f486cf5d5bca588f12af02d1b15be (diff)
gpu: nvgpu: move mclk related functions to clk
Move mclk related functions be moved to clk structure instead of pmu. We want to keep pmu only for basic pmu interaction and split clk, lpwr etc. Bug 1921094 Change-Id: I32394bc0e6d3657dfbd34dbcf19c9af56c12e194 Signed-off-by: Thomas Fleury <tfleury@nvidia.com> Reviewed-on: https://git-master/r/1506586 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gk20a/gk20a.h')
-rw-r--r--drivers/gpu/nvgpu/gk20a/gk20a.h6
1 files changed, 3 insertions, 3 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.h b/drivers/gpu/nvgpu/gk20a/gk20a.h
index 06db2b7f..9b28e0c6 100644
--- a/drivers/gpu/nvgpu/gk20a/gk20a.h
+++ b/drivers/gpu/nvgpu/gk20a/gk20a.h
@@ -772,9 +772,6 @@ struct gpu_ops {
772 void *lsfm, u32 *p_bl_gen_desc_size); 772 void *lsfm, u32 *p_bl_gen_desc_size);
773 int (*flcn_populate_bl_dmem_desc)(struct gk20a *g, 773 int (*flcn_populate_bl_dmem_desc)(struct gk20a *g,
774 void *lsfm, u32 *p_bl_gen_desc_size, u32 falconid); 774 void *lsfm, u32 *p_bl_gen_desc_size, u32 falconid);
775 int (*mclk_init)(struct gk20a *g);
776 void (*mclk_deinit)(struct gk20a *g);
777 int (*mclk_change)(struct gk20a *g, u16 val);
778 void (*handle_ext_irq)(struct gk20a *g, u32 intr); 775 void (*handle_ext_irq)(struct gk20a *g, u32 intr);
779 void (*set_irqmask)(struct gk20a *g); 776 void (*set_irqmask)(struct gk20a *g);
780 u32 lspmuwprinitdone; 777 u32 lspmuwprinitdone;
@@ -802,6 +799,9 @@ struct gpu_ops {
802 int (*pll_reg_write)(struct gk20a *g, u32 reg, u32 val); 799 int (*pll_reg_write)(struct gk20a *g, u32 reg, u32 val);
803 int (*get_pll_debug_data)(struct gk20a *g, 800 int (*get_pll_debug_data)(struct gk20a *g,
804 struct nvgpu_clk_pll_debug_data *d); 801 struct nvgpu_clk_pll_debug_data *d);
802 int (*mclk_init)(struct gk20a *g);
803 void (*mclk_deinit)(struct gk20a *g);
804 int (*mclk_change)(struct gk20a *g, u16 val);
805 } clk; 805 } clk;
806 struct { 806 struct {
807 u32 (*get_arbiter_clk_domains)(struct gk20a *g); 807 u32 (*get_arbiter_clk_domains)(struct gk20a *g);