gpu: nvgpu: Make LTC disabling common code

Refactor the sync_debugfs LTC HAL op so that the logic to enable
or disable LTC goes to common code nvgpu_ltc_sync_enabled() and
the LTC HAL set_enabled only performs the hardware register access.

Create a new common function nvgpu_init_ltc_support() to initialize
the LTC software variable, and move hardware initialization of LTC to
be called from it.

JIRA NVGPU-62

Change-Id: Ib1cf4f5b83ca3dac08407464ed56a732e0a33923
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1528262
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

1 files changed, 3 insertions, 4 deletions

diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.h b/drivers/gpu/nvgpu/gk20a/gk20a.h
index 8d9318b2..f7b714f2 100644
--- a/drivers/gpu/nvgpu/gk20a/gk20a.h
+++ b/drivers/gpu/nvgpu/gk20a/gk20a.h
@@ -144,9 +144,7 @@ struct gpu_ops {
                                             struct zbc_entry *s_val,
                                             u32 index);
                 void (*init_cbc)(struct gk20a *g, struct gr_gk20a *gr);
-#ifdef CONFIG_DEBUG_FS
-                void (*sync_debugfs)(struct gk20a *g);
-#endif
+                void (*set_enabled)(struct gk20a *g, bool enabled);
                 void (*init_fs_state)(struct gk20a *g);
                 void (*isr)(struct gk20a *g);
                 u32 (*cbc_fix_config)(struct gk20a *g, int base);
@@ -1147,8 +1145,9 @@ struct gk20a {
 
         u32 emc3d_ratio;
 
+        struct nvgpu_spinlock ltc_enabled_lock;
+
 #ifdef CONFIG_DEBUG_FS
-        struct nvgpu_spinlock debugfs_lock;
         struct dentry *debugfs_ltc_enabled;
         struct dentry *debugfs_timeouts_enabled;
         struct dentry *debugfs_gr_idle_timeout_default;