nvgpu: Host side changes to support HS mode

GM20B changes in PMU boot sequence to support booting in
HS mode and LS mode

Bug 1509680

Change-Id: I2832eda0efe17dd5e3a8f11dd06e7d4da267be70
Signed-off-by: Supriya <ssharatkumar@nvidia.com>
Reviewed-on: http://git-master/r/423140
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Tested-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Shridhar Rasal <srasal@nvidia.com>
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

1 files changed, 9 insertions, 0 deletions

diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.h b/drivers/gpu/nvgpu/gk20a/gk20a.h
index 726994ff..da5cc917 100644
--- a/drivers/gpu/nvgpu/gk20a/gk20a.h
+++ b/drivers/gpu/nvgpu/gk20a/gk20a.h
@@ -28,6 +28,7 @@ struct channel_gk20a;
 struct gr_gk20a;
 struct sim_gk20a;
 struct gk20a_ctxsw_ucode_segments;
+struct acr_gm20b;
 
 #include <linux/sched.h>
 #include <linux/spinlock.h>
@@ -45,6 +46,7 @@ struct gk20a_ctxsw_ucode_segments;
 #include "priv_ring_gk20a.h"
 #include "therm_gk20a.h"
 #include "platform_gk20a.h"
+#include "gm20b/acr_gm20b.h"
 
 extern struct platform_device tegra_gk20a_device;
 
@@ -205,6 +207,8 @@ struct gpu_ops {
                                 struct pmu_sequence *seq);
                 void *(*get_pmu_seq_out_a_ptr)(
                                 struct pmu_sequence *seq);
+                void (*set_pmu_cmdline_args_secure_mode)(struct pmu_gk20a *pmu,
+                        u32 val);
         } pmu_ver;
         struct {
                 int (*get_netlist_name)(int index, char *name);
@@ -214,6 +218,10 @@ struct gpu_ops {
                 int (*set_sparse)(struct vm_gk20a *vm, u64 vaddr,
                                u32 num_pages, u32 pgsz_idx);
         } mm;
+        struct {
+                int (*pmu_setup_sw)(struct gk20a *g);
+                int (*pmu_setup_hw_and_bootstrap)(struct gk20a *g);
+        } pmu;
 };
 
 struct gk20a {
@@ -236,6 +244,7 @@ struct gk20a {
         struct sim_gk20a sim;
         struct mm_gk20a mm;
         struct pmu_gk20a pmu;
+        struct acr_gm20b acr;
         struct cooling_device_gk20a gk20a_cdev;
 
         /* Save pmu fw here so that it lives cross suspend/resume.