gpu: nvgpu: support masking hww_warp_esr

Add below API pointer to support masking of hww_warp_esr
after hardware read of register and before using it
further
u32 (*mask_hww_warp_esr)(u32 hww_warp_esr)

If needed, this API will mask value of hww_warp_esr
appropriately and return it

Bug 200156699

Change-Id: I1afb1347e650fab607009c1ee55691484653a4c1
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/927133
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>

1 files changed, 1 insertions, 0 deletions

diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.h b/drivers/gpu/nvgpu/gk20a/gk20a.h
index 333f8889..2b4c3237 100644
--- a/drivers/gpu/nvgpu/gk20a/gk20a.h
+++ b/drivers/gpu/nvgpu/gk20a/gk20a.h
@@ -201,6 +201,7 @@ struct gpu_ops {
                                 bool sm_debugger_attached,
                                 struct channel_gk20a *fault_ch,
                                 bool *early_exit, bool *ignore_debugger);
+                u32 (*mask_hww_warp_esr)(u32 hww_warp_esr);
         } gr;
         const char *name;
         struct {