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authorTerje Bergstrom <tbergstrom@nvidia.com>2017-06-05 17:25:35 -0400
committermobile promotions <svcmobile_promotions@nvidia.com>2017-06-07 23:07:00 -0400
commit942029a433390f3385ed9d6fc35476bbf9eafd98 (patch)
tree5a3ad7164d71908c3b0da0d95fb0220cc247af36 /drivers/gpu/nvgpu/gk20a/gk20a.h
parentfc724baa4becf051b3e6647858a6ded90f1cee86 (diff)
gpu: nvgpu: Split non-stall interrupt handling
Split handling of stalling interrupt to Linux specific chip agnostic and OS independent chip specific parts. Linux specific chip independent part contains handler for ISR and passing the control to a bottom half worker. It uses the new MC HALs intr_nonstall (query interrupt status), intr_nonstall_pause (pause interrupts), intr_nonstall_resume (resume interrupts), and is_intr1_pending (query per-engine interrupt bit). MC HAL isr_nonstall is removed, because its work is now handled in chip independent code. JIRA NVGPU-26 Change-Id: I3e4c9905ef6eef7f1cc9f71b0278518ae663f87e Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/1497048 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gk20a/gk20a.h')
-rw-r--r--drivers/gpu/nvgpu/gk20a/gk20a.h7
1 files changed, 3 insertions, 4 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.h b/drivers/gpu/nvgpu/gk20a/gk20a.h
index bd93cc33..60494050 100644
--- a/drivers/gpu/nvgpu/gk20a/gk20a.h
+++ b/drivers/gpu/nvgpu/gk20a/gk20a.h
@@ -36,7 +36,6 @@ struct nvgpu_clk_pll_debug_data;
36#include <linux/sched.h> 36#include <linux/sched.h>
37#include <nvgpu/lock.h> 37#include <nvgpu/lock.h>
38#include <nvgpu/thread.h> 38#include <nvgpu/thread.h>
39#include <linux/irqreturn.h>
40#include <linux/version.h> 39#include <linux/version.h>
41#include <linux/cdev.h> 40#include <linux/cdev.h>
42#ifdef CONFIG_DEBUG_FS 41#ifdef CONFIG_DEBUG_FS
@@ -841,14 +840,14 @@ struct gpu_ops {
841 void (*intr_unit_config)(struct gk20a *g, 840 void (*intr_unit_config)(struct gk20a *g,
842 bool enable, bool is_stalling, u32 unit); 841 bool enable, bool is_stalling, u32 unit);
843 void (*isr_stall)(struct gk20a *g); 842 void (*isr_stall)(struct gk20a *g);
844 irqreturn_t (*isr_nonstall)(struct gk20a *g);
845 void (*isr_thread_nonstall)(struct gk20a *g, u32 intr);
846 void (*isr_nonstall_cb)(struct work_struct *work);
847 bool (*is_intr_hub_pending)(struct gk20a *g, u32 mc_intr); 843 bool (*is_intr_hub_pending)(struct gk20a *g, u32 mc_intr);
848 u32 intr_mask_restore[4]; 844 u32 intr_mask_restore[4];
849 u32 (*intr_stall)(struct gk20a *g); 845 u32 (*intr_stall)(struct gk20a *g);
850 void (*intr_stall_pause)(struct gk20a *g); 846 void (*intr_stall_pause)(struct gk20a *g);
851 void (*intr_stall_resume)(struct gk20a *g); 847 void (*intr_stall_resume)(struct gk20a *g);
848 u32 (*intr_nonstall)(struct gk20a *g);
849 void (*intr_nonstall_pause)(struct gk20a *g);
850 void (*intr_nonstall_resume)(struct gk20a *g);
852 void (*enable)(struct gk20a *g, u32 units); 851 void (*enable)(struct gk20a *g, u32 units);
853 void (*disable)(struct gk20a *g, u32 units); 852 void (*disable)(struct gk20a *g, u32 units);
854 void (*reset)(struct gk20a *g, u32 units); 853 void (*reset)(struct gk20a *g, u32 units);