gpu: nvgpu: Implement per-chip pagepool size

Bug 1567274

Change-Id: Ib366f56c109f60be98435124e9e73697d161c4d0
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/606935
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit

1 files changed, 1 insertions, 0 deletions

diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.h b/drivers/gpu/nvgpu/gk20a/gk20a.h
index 5ca07d7f..afe1447e 100644
--- a/drivers/gpu/nvgpu/gk20a/gk20a.h
+++ b/drivers/gpu/nvgpu/gk20a/gk20a.h
@@ -143,6 +143,7 @@ struct gpu_ops {
                                   struct zbc_entry *color_val, u32 index);
                 int (*add_zbc_depth)(struct gk20a *g, struct gr_gk20a *gr,
                                   struct zbc_entry *depth_val, u32 index);
+                void (*buffer_size_defaults)(struct gk20a *g);
         } gr;
         const char *name;
         struct {