gpu: nvgpu: Split HUB and GPC MMU debug mode set

HUB and GPC MMU debug modes were set in the same function. This
introduced a dependency from FB code to GR registers. Split setting
of GPC MMU debug mode to GR HAL.

Change-Id: I003446f9dfa147f526bd01d3b6130f4037d9b183
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1801420
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

1 files changed, 1 insertions, 0 deletions

diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.h b/drivers/gpu/nvgpu/gk20a/gk20a.h
index f62dfb94..f0b0bebe 100644
--- a/drivers/gpu/nvgpu/gk20a/gk20a.h
+++ b/drivers/gpu/nvgpu/gk20a/gk20a.h
@@ -509,6 +509,7 @@ struct gpu_ops {
                         enum ctxsw_addr_type addr_type, u32 num_tpcs,
                         u32 num_ppcs, u32 reg_list_ppc_count,
                         u32 *__offset_in_segment);
+                void (*set_debug_mode)(struct gk20a *g, bool enable);
         } gr;
         struct {
                 void (*init_hw)(struct gk20a *g);