gpu: nvgpu: fix handling of EGPC_ETPC_SM addresses

Added new defines for following litter values:
GPU_LIT_SMPC_PRI_BASE
GPU_LIT_SMPC_PRI_SHARED_BASE
GPU_LIT_SMPC_PRI_UNIQUE_BASE9
GPU_LIT_SMPC_PRI_STRIDE

Calculate offsets for ctx operations considering
sm per tpc. Following functions are modified for this:
gr_gk20a_get_ctx_buffer_offsets
gr_gk20a_get_pm_ctx_buffer_offsets
__gr_gk20a_exec_ctx_ops

Bug 200337994

Change-Id: I3a4ca470a4107d3078b708f38601762626ce1bf1
Signed-off-by: seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1539069
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

1 files changed, 4 insertions, 0 deletions

diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.h b/drivers/gpu/nvgpu/gk20a/gk20a.h
index dbf36f5c..8dabee63 100644
--- a/drivers/gpu/nvgpu/gk20a/gk20a.h
+++ b/drivers/gpu/nvgpu/gk20a/gk20a.h
@@ -129,6 +129,10 @@ enum gk20a_cbc_op {
 #define GPU_LIT_FBPA_BASE       24
 #define GPU_LIT_FBPA_SHARED_BASE 25
 #define GPU_LIT_SM_PRI_STRIDE   26
+#define GPU_LIT_SMPC_PRI_BASE           27
+#define GPU_LIT_SMPC_PRI_SHARED_BASE    28
+#define GPU_LIT_SMPC_PRI_UNIQUE_BASE    29
+#define GPU_LIT_SMPC_PRI_STRIDE         30
 
 #define nvgpu_get_litter_value(g, v) (g)->ops.get_litter_value((g), v)