gpu: nvgpu: PG engines init/allow/disallow update

- pmu_init_powergating loops & init multiple
  PG engines based on PG engines supported
- generalize pg init param HAL to support
  multiple PG-engine init based on PG engine
  parameter
- HAL's to return supported PG engines on chip &
  its sub features of engine.
- Send Allow/Disallow for PG engines which are
  enabled & supported.
- Added defines for pg engines

JIRA DNVGPU-71

Change-Id: I236601e092e519a269fcb17c7d1c523a4b51405f
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: http://git-master/r/1247409
(cherry-picked from commit 1c138cc475bac7d3c3fbbd5fb18cfcb2e7fdf67a)
Reviewed-on: http://git-master/r/1269319
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

1 files changed, 4 insertions, 2 deletions

diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.h b/drivers/gpu/nvgpu/gk20a/gk20a.h
index 987dd517..a1a8bf36 100644
--- a/drivers/gpu/nvgpu/gk20a/gk20a.h
+++ b/drivers/gpu/nvgpu/gk20a/gk20a.h
@@ -606,8 +606,10 @@ struct gpu_ops {
                 void (*pmu_elpg_statistics)(struct gk20a *g,
                         u32 *ingating_time, u32 *ungating_time,
                         u32 *gating_cnt);
-                int (*pmu_pg_grinit_param)(struct gk20a *g,
-                        u8 grfeaturemask);
+                int (*pmu_pg_init_param)(struct gk20a *g, u32 pg_engine_id);
+                u32 (*pmu_pg_supported_engines_list)(struct gk20a *g);
+                u32 (*pmu_pg_engines_feature_list)(struct gk20a *g,
+                        u32 pg_engine_id);
                 int (*send_lrf_tex_ltc_dram_overide_en_dis_cmd)
                         (struct gk20a *g, u32 mask);
                 void (*dump_secure_fuses)(struct gk20a *g);