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authorMahantesh Kumbar <mkumbar@nvidia.com>2016-11-03 11:40:24 -0400
committermobile promotions <svcmobile_promotions@nvidia.com>2016-12-26 01:20:09 -0500
commit71fbfdb2b84a4f778f19e44421a66e28e5aadf8d (patch)
tree5bbc2e22682e73b64fa6492bdab27301f254d362 /drivers/gpu/nvgpu/gk20a/gk20a.h
parent66ed536fb5e57ad73ffbaf24f9c02f0655e7d6cc (diff)
gpu: nvgpu: MSCG support
- Added enable_mscg, mscg_enabled & mscg_stat flags, mscg_enabled flag can be used to controll mscg enable/disable at runtime along with mscg_stat flag. - Added defines & interface to support ms/mclk-change/post-init-param - Added defines for lpwr tables read from vbios. - HAL to support post init param which is require to setup clockgating interface in PMU & interfaces used during mscg state machine. - gk20a_pmu_pg_global_enable() can be called when pg support required to enable/disable, this also checks & wait if pstate switch is in progress till it complets - pg_mutex to protect PG-RPPG/MSCG enable/disable JIRA DNVGPU-71 Change-Id: If312cefc888a4de0a5c96898baeaac1a76e53e46 Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com> Reviewed-on: http://git-master/r/1247554 (cherry picked from commit e6c94948b8058ba642ea56677ad798fc56b8a28a) Reviewed-on: http://git-master/r/1270971 GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gk20a/gk20a.h')
-rw-r--r--drivers/gpu/nvgpu/gk20a/gk20a.h4
1 files changed, 4 insertions, 0 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.h b/drivers/gpu/nvgpu/gk20a/gk20a.h
index a1a8bf36..782469df 100644
--- a/drivers/gpu/nvgpu/gk20a/gk20a.h
+++ b/drivers/gpu/nvgpu/gk20a/gk20a.h
@@ -610,6 +610,9 @@ struct gpu_ops {
610 u32 (*pmu_pg_supported_engines_list)(struct gk20a *g); 610 u32 (*pmu_pg_supported_engines_list)(struct gk20a *g);
611 u32 (*pmu_pg_engines_feature_list)(struct gk20a *g, 611 u32 (*pmu_pg_engines_feature_list)(struct gk20a *g,
612 u32 pg_engine_id); 612 u32 pg_engine_id);
613 int (*pmu_lpwr_enable_pg)(struct gk20a *g, bool pstate_lock);
614 int (*pmu_lpwr_disable_pg)(struct gk20a *g, bool pstate_lock);
615 u32 (*pmu_pg_param_post_init)(struct gk20a *g);
613 int (*send_lrf_tex_ltc_dram_overide_en_dis_cmd) 616 int (*send_lrf_tex_ltc_dram_overide_en_dis_cmd)
614 (struct gk20a *g, u32 mask); 617 (struct gk20a *g, u32 mask);
615 void (*dump_secure_fuses)(struct gk20a *g); 618 void (*dump_secure_fuses)(struct gk20a *g);
@@ -847,6 +850,7 @@ struct gk20a {
847 bool elcg_enabled; 850 bool elcg_enabled;
848 bool elpg_enabled; 851 bool elpg_enabled;
849 bool aelpg_enabled; 852 bool aelpg_enabled;
853 bool mscg_enabled;
850 bool forced_idle; 854 bool forced_idle;
851 bool forced_reset; 855 bool forced_reset;
852 bool allow_all; 856 bool allow_all;