gpu: nvgpu: Use internal nvgpu_warpstate

Replace use of ioctl structure warpstate with internal
nvgpu_warptate.

JIRA NVGPU-259

Change-Id: I5170364d0443235cee471b87fa332fc09588f5d3
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1578684
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

1 files changed, 3 insertions, 2 deletions

diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.h b/drivers/gpu/nvgpu/gk20a/gk20a.h
index 8efb009a..ead1f69e 100644
--- a/drivers/gpu/nvgpu/gk20a/gk20a.h
+++ b/drivers/gpu/nvgpu/gk20a/gk20a.h
@@ -41,6 +41,7 @@ struct nvgpu_clk_pll_debug_data;
 struct nvgpu_nvhost_dev;
 struct nvgpu_cpu_time_correlation_sample;
 struct nvgpu_mem_sgt;
+struct nvgpu_warpstate;
 
 #include <nvgpu/lock.h>
 #include <nvgpu/thread.h>
@@ -308,7 +309,7 @@ struct gpu_ops {
                 int (*set_sm_debug_mode)(struct gk20a *g, struct channel_gk20a *ch,
                                         u64 sms, bool enable);
                 void (*bpt_reg_info)(struct gk20a *g,
-                                struct warpstate *w_state);
+                                struct nvgpu_warpstate *w_state);
                 void (*get_access_map)(struct gk20a *g,
                                       u32 **whitelist, int *num_entries);
                 int (*handle_fecs_error)(struct gk20a *g,
@@ -407,7 +408,7 @@ struct gpu_ops {
                 void (*load_tpc_mask)(struct gk20a *g);
                 int (*inval_icache)(struct gk20a *g, struct channel_gk20a *ch);
                 int (*trigger_suspend)(struct gk20a *g);
-                int (*wait_for_pause)(struct gk20a *g, struct warpstate *w_state);
+                int (*wait_for_pause)(struct gk20a *g, struct nvgpu_warpstate *w_state);
                 int (*resume_from_pause)(struct gk20a *g);
                 int (*clear_sm_errors)(struct gk20a *g);
                 u32 (*tpc_enabled_exceptions)(struct gk20a *g);