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authorTerje Bergstrom <tbergstrom@nvidia.com>2014-05-22 02:53:51 -0400
committerDan Willemsen <dwillemsen@nvidia.com>2015-03-18 15:09:56 -0400
commit48f0b407f967d73a2301a215bb5c381be3876a20 (patch)
tree05c72e3a3681f3e84daf5f197661721d71d44289 /drivers/gpu/nvgpu/gk20a/gk20a.h
parentd78dca61e0eb92e69e1fa5650c0e946a21a930d2 (diff)
gpu: nvgpu: Add gm20b fecs/gpccs bootloader support
Add support for booting FECS and GPCCS via faster bootloader method. We leave this disabled until the bootloader binaries are checked in. Change-Id: I39df5d116f7a33486407518c743638b01923970d Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/413005
Diffstat (limited to 'drivers/gpu/nvgpu/gk20a/gk20a.h')
-rw-r--r--drivers/gpu/nvgpu/gk20a/gk20a.h5
1 files changed, 5 insertions, 0 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.h b/drivers/gpu/nvgpu/gk20a/gk20a.h
index e6630ebf..115cd7f4 100644
--- a/drivers/gpu/nvgpu/gk20a/gk20a.h
+++ b/drivers/gpu/nvgpu/gk20a/gk20a.h
@@ -27,6 +27,7 @@ struct fifo_gk20a;
27struct channel_gk20a; 27struct channel_gk20a;
28struct gr_gk20a; 28struct gr_gk20a;
29struct sim_gk20a; 29struct sim_gk20a;
30struct gk20a_ctxsw_ucode_segments;
30 31
31#include <linux/sched.h> 32#include <linux/sched.h>
32#include <linux/spinlock.h> 33#include <linux/spinlock.h>
@@ -121,6 +122,10 @@ struct gpu_ops {
121 void (*set_hww_esr_report_mask)(struct gk20a *g); 122 void (*set_hww_esr_report_mask)(struct gk20a *g);
122 int (*setup_alpha_beta_tables)(struct gk20a *g, 123 int (*setup_alpha_beta_tables)(struct gk20a *g,
123 struct gr_gk20a *gr); 124 struct gr_gk20a *gr);
125 int (*falcon_load_ucode)(struct gk20a *g,
126 u64 addr_base,
127 struct gk20a_ctxsw_ucode_segments *segments,
128 u32 reg_offset);
124 } gr; 129 } gr;
125 const char *name; 130 const char *name;
126 struct { 131 struct {