gpu: nvgpu: support platform specific physical address translation

On some GPUs certain physical address bits have special meaning. This
patch adds support for setting those bits based on the GMMU attributes
struct.

Jira GPUT19X-10
Bug 200279508

Change-Id: I32b8a028be7fd62af06a60c393a8c9251de0ef3c
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master/r/1512600
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>

1 files changed, 2 insertions, 0 deletions

diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.h b/drivers/gpu/nvgpu/gk20a/gk20a.h
index e30a89fe..f365ac94 100644
--- a/drivers/gpu/nvgpu/gk20a/gk20a.h
+++ b/drivers/gpu/nvgpu/gk20a/gk20a.h
@@ -713,6 +713,8 @@ struct gpu_ops {
                         (*get_mmu_levels)(struct gk20a *g, u32 big_page_size);
                 void (*init_pdb)(struct gk20a *g, struct nvgpu_mem *inst_block,
                                 struct vm_gk20a *vm);
+                u64 (*gpu_phys_addr)(struct gk20a *g,
+                                     struct nvgpu_gmmu_attrs *attrs, u64 phys);
                 u64 (*get_iova_addr)(struct gk20a *g, struct scatterlist *sgl,
                                          u32 flags);
                 size_t (*get_vidmem_size)(struct gk20a *g);