gpu: nvgpu: refactor interrupt handling

JIRA: EVLR-1004

(*) Refactor the non-stalling interrupt path to execute clear on the
top half, so on dGPU case processing of stalling interrupts does not
block non-stalling one.
(*) Use a worker thread to do semaphore wakeups and allow batching of
the non-stalling operations.
(*) Fix a bug where some gpus will not properly track the completion
of interrupts, preventing safe driver unloads

Change-Id: Icc90a3acba544c97ec6a9285ab235d337ab9eefa
Signed-off-by: David Nieto <dmartineznie@nvidia.com>
Reviewed-on: http://git-master/r/1312796
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Lakshmanan M <lm@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: Navneet Kumar <navneetk@nvidia.com>

1 files changed, 13 insertions, 2 deletions

diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.h b/drivers/gpu/nvgpu/gk20a/gk20a.h
index 12c9a3ea..092bf7ae 100644
--- a/drivers/gpu/nvgpu/gk20a/gk20a.h
+++ b/drivers/gpu/nvgpu/gk20a/gk20a.h
@@ -155,7 +155,7 @@ struct gpu_ops {
         } ltc;
         struct {
                 void (*isr_stall)(struct gk20a *g, u32 inst_id, u32 pri_base);
-                void (*isr_nonstall)(struct gk20a *g, u32 inst_id, u32 pri_base);
+                int (*isr_nonstall)(struct gk20a *g, u32 inst_id, u32 pri_base);
         } ce2;
         struct {
                 int (*init_fs_state)(struct gk20a *g);
@@ -735,7 +735,8 @@ struct gpu_ops {
                 irqreturn_t (*isr_stall)(struct gk20a *g);
                 irqreturn_t (*isr_nonstall)(struct gk20a *g);
                 irqreturn_t (*isr_thread_stall)(struct gk20a *g);
-                irqreturn_t (*isr_thread_nonstall)(struct gk20a *g);
+                void (*isr_thread_nonstall)(struct gk20a *g, u32 intr);
+                void (*isr_nonstall_cb)(struct work_struct *work);
                 u32 intr_mask_restore[4];
         } mc;
         struct {
@@ -848,6 +849,10 @@ struct gk20a {
         atomic_t usage_count;
         int driver_is_dying;
 
+        atomic_t nonstall_ops;
+        struct work_struct nonstall_fn_work;
+        struct workqueue_struct *nonstall_work_queue;
+
         struct resource *reg_mem;
         void __iomem *regs;
         void __iomem *regs_saved;
@@ -1151,6 +1156,12 @@ enum gk20a_dbg_categories {
         gpu_dbg_mem     = BIT(31), /* memory accesses, very verbose */
 };
 
+/* operations that will need to be executed on non stall workqueue */
+enum gk20a_nonstall_ops {
+        gk20a_nonstall_ops_wakeup_semaphore = BIT(0), /* wake up semaphore */
+        gk20a_nonstall_ops_post_events = BIT(1),
+};
+
 extern u32 gk20a_dbg_mask;
 #ifdef CONFIG_GK20A_TRACE_PRINTK
 extern u32 gk20a_dbg_ftrace;