gpu: nvgpu: move clk_gm20b debugfs to Linux module

Move debugfs code from clk_gm20b.c to file in Linux module
common/linux/debug_clk.c
This file will be compiled only if CONFIG_DEBUG_FS is set

Define below new HAL APIs for various clock operations
which can be accessed from debug file
init_debugfs()
get_voltage()
get_gpcclk_clock_counter()
pll_reg_write()
get_pll_debug_data()

Export nvgpu_pl_to_div() and nvgpu_div_to_pl() so
that these can be accessed from debug_clk.c

Add new structure nvgpu_clk_pll_debug_data so that
all required register values for debugging can be
made available in debug_clk.c

Add new API gm20b_get_gpc_pll_parms() so that statically
defined variable can be accessed in debug_clk.c too

Remove global variable dvfs_safe_max_freq and add
it to struct clk_gk20a so that it can accessed
from both clk_gm20b.c and debug_clk.c

Jira NVGPU-62

Change-Id: I3ae70b40235e78141a686686930e1f178ad59453
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/1488903
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>

1 files changed, 7 insertions, 0 deletions

diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.h b/drivers/gpu/nvgpu/gk20a/gk20a.h
index 37e2e185..4fc626e8 100644
--- a/drivers/gpu/nvgpu/gk20a/gk20a.h
+++ b/drivers/gpu/nvgpu/gk20a/gk20a.h
@@ -31,6 +31,7 @@ struct nvgpu_mem_alloc_tracker;
 struct dbg_profiler_object_data;
 struct ecc_gk20a;
 struct gk20a_debug_output;
+struct nvgpu_clk_pll_debug_data;
 
 #include <linux/sched.h>
 #include <nvgpu/lock.h>
@@ -777,6 +778,7 @@ struct gpu_ops {
                 void (*set_irqmask)(struct gk20a *g);
         } pmu;
         struct {
+                int (*init_debugfs)(struct gk20a *g);
                 void (*disable_slowboot)(struct gk20a *g);
                 int (*init_clk_support)(struct gk20a *g);
                 int (*suspend_clk_support)(struct gk20a *g);
@@ -791,6 +793,11 @@ struct gpu_ops {
                 unsigned long (*get_maxrate)(struct clk_gk20a *clk);
                 int (*prepare_enable)(struct clk_gk20a *clk);
                 void (*disable_unprepare)(struct clk_gk20a *clk);
+                int (*get_voltage)(struct clk_gk20a *clk, u64 *val);
+                int (*get_gpcclk_clock_counter)(struct clk_gk20a *clk, u64 *val);
+                int (*pll_reg_write)(struct gk20a *g, u32 reg, u32 val);
+                int (*get_pll_debug_data)(struct gk20a *g,
+                                struct nvgpu_clk_pll_debug_data *d);
         } clk;
         struct {
                 u32 (*get_arbiter_clk_domains)(struct gk20a *g);