gpu: nvgpu: add HAL for regops

Bug 1500195

Change-Id: I5545d1a95a58e7daa5a74cc20f3fc6828774fc42
Signed-off-by: Kevin Huang <kevinh@nvidia.com>
Reviewed-on: http://git-master/r/488507
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>

1 files changed, 18 insertions, 0 deletions

diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.h b/drivers/gpu/nvgpu/gk20a/gk20a.h
index de234972..fc97fcb9 100644
--- a/drivers/gpu/nvgpu/gk20a/gk20a.h
+++ b/drivers/gpu/nvgpu/gk20a/gk20a.h
@@ -298,6 +298,24 @@ struct gpu_ops {
                 int (*suspend_clk_support)(struct gk20a *g);
         } clk;
         bool privsecurity;
+        struct {
+                const struct regop_offset_range* (
+                                *get_global_whitelist_ranges)(void);
+                int (*get_global_whitelist_ranges_count)(void);
+                const struct regop_offset_range* (
+                                *get_context_whitelist_ranges)(void);
+                int (*get_context_whitelist_ranges_count)(void);
+                const u32* (*get_runcontrol_whitelist)(void);
+                int (*get_runcontrol_whitelist_count)(void);
+                const struct regop_offset_range* (
+                                *get_runcontrol_whitelist_ranges)(void);
+                int (*get_runcontrol_whitelist_ranges_count)(void);
+                const u32* (*get_qctl_whitelist)(void);
+                int (*get_qctl_whitelist_count)(void);
+                const struct regop_offset_range* (
+                                *get_qctl_whitelist_ranges)(void);
+                int (*get_qctl_whitelist_ranges_count)(void);
+        } regops;
 };
 
 struct gk20a {