gpu: nvgpu: halify size of patch buffer

Allow per chip calculation of gr patch buffer size
and set default to match hw default of 512 data-address pair entries (4K)

bug 200350539

Change-Id: I6010c9e0304332825cb02612d3f10523ef27d128
Signed-off-by: David Nieto <dmartineznie@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1584033
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

1 files changed, 1 insertions, 0 deletions

diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.h b/drivers/gpu/nvgpu/gk20a/gk20a.h
index 80d85d65..d7fdffb0 100644
--- a/drivers/gpu/nvgpu/gk20a/gk20a.h
+++ b/drivers/gpu/nvgpu/gk20a/gk20a.h
@@ -172,6 +172,7 @@ struct gpu_ops {
                 u32 (*get_num_pce)(struct gk20a *g);
         } ce2;
         struct {
+                u32 (*get_patch_slots)(struct gk20a *g);
                 int (*init_fs_state)(struct gk20a *g);
                 int (*init_preemption_state)(struct gk20a *g);
                 void (*access_smpc_reg)(struct gk20a *g, u32 quad, u32 offset);