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authorAlex Waterman <alexw@nvidia.com>2018-06-26 11:53:15 -0400
committerAlex Waterman <alexw@nvidia.com>2018-06-26 17:43:08 -0400
commit0b02c8589dcc507865a8fd398431c45fbda2ba9c (patch)
tree7714c296d600b118ea71abb8cc6fab7b2aa50de2 /drivers/gpu/nvgpu/gk20a/gk20a.h
parent8586414cc15ca36e92cf3c40c2cfb2f8b2691bee (diff)
Revert: GV11B runlist preemption patches
This reverts commit 2d397e34a5aafb5feed406a13f3db536eadae5bb. This reverts commit cd6e821cf66837a2c3479e928414007064b9c496. This reverts commit 5cf1eb145fef763f7153e449be60f1a7602e2c81. This reverts commit a8d6f31bde3ccef22ee77023eaff4a62f6f88199. This reverts commit 067ddbc4e4df3f1f756f03e7865c369a46f420aa. This reverts commit 3eede64de058fcb1e39d723dd146bcd5d06c6f43. This reverts commit 1407133b7e1b27a92ee8c116009541904d2ff691. This reverts commit 797dde3e32647df3b616cea67f4defae59d38b3f. Looks like this makes the ap_compute test on embedded-qnx-hv e3550-t194 quite bad. Might also affect ap_resmgr. Signed-off-by: Alex Waterman <alexw@nvidia.com> Change-Id: Ib9f06514d554d1a67993f0f2bd3d180147385e0a Reviewed-on: https://git-master.nvidia.com/r/1761864 Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> GVS: Gerrit_Virtual_Submit
Diffstat (limited to 'drivers/gpu/nvgpu/gk20a/gk20a.h')
-rw-r--r--drivers/gpu/nvgpu/gk20a/gk20a.h6
1 files changed, 3 insertions, 3 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.h b/drivers/gpu/nvgpu/gk20a/gk20a.h
index fac02f68..9061236e 100644
--- a/drivers/gpu/nvgpu/gk20a/gk20a.h
+++ b/drivers/gpu/nvgpu/gk20a/gk20a.h
@@ -662,9 +662,9 @@ struct gpu_ops {
662 struct ch_state *ch_state); 662 struct ch_state *ch_state);
663 u32 (*intr_0_error_mask)(struct gk20a *g); 663 u32 (*intr_0_error_mask)(struct gk20a *g);
664 int (*is_preempt_pending)(struct gk20a *g, u32 id, 664 int (*is_preempt_pending)(struct gk20a *g, u32 id,
665 unsigned int id_type); 665 unsigned int id_type, unsigned int timeout_rc_type);
666 int (*preempt_ch_tsg)(struct gk20a *g, u32 id, 666 int (*preempt_ch_tsg)(struct gk20a *g, u32 id,
667 unsigned int id_type); 667 unsigned int id_type, unsigned int timeout_rc_type);
668 void (*init_pbdma_intr_descs)(struct fifo_gk20a *f); 668 void (*init_pbdma_intr_descs)(struct fifo_gk20a *f);
669 int (*reset_enable_hw)(struct gk20a *g); 669 int (*reset_enable_hw)(struct gk20a *g);
670 int (*setup_userd)(struct channel_gk20a *c); 670 int (*setup_userd)(struct channel_gk20a *c);
@@ -1109,7 +1109,7 @@ struct gpu_ops {
1109 bool (*is_intr_hub_pending)(struct gk20a *g, u32 mc_intr); 1109 bool (*is_intr_hub_pending)(struct gk20a *g, u32 mc_intr);
1110 bool (*is_intr_nvlink_pending)(struct gk20a *g, u32 mc_intr); 1110 bool (*is_intr_nvlink_pending)(struct gk20a *g, u32 mc_intr);
1111 bool (*is_stall_and_eng_intr_pending)(struct gk20a *g, 1111 bool (*is_stall_and_eng_intr_pending)(struct gk20a *g,
1112 u32 act_eng_id, u32 *eng_intr_pending); 1112 u32 act_eng_id);
1113 u32 (*intr_stall)(struct gk20a *g); 1113 u32 (*intr_stall)(struct gk20a *g);
1114 void (*intr_stall_pause)(struct gk20a *g); 1114 void (*intr_stall_pause)(struct gk20a *g);
1115 void (*intr_stall_resume)(struct gk20a *g); 1115 void (*intr_stall_resume)(struct gk20a *g);