diff options
author | Alex Waterman <alexw@nvidia.com> | 2017-05-25 19:56:50 -0400 |
---|---|---|
committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2017-09-22 15:52:48 -0400 |
commit | 0090ee5aca268a3c359f34c74b8c521df3bd8593 (patch) | |
tree | 2779dc64554cdb38b717ce09c0e3dcbf36107ed3 /drivers/gpu/nvgpu/gk20a/gk20a.h | |
parent | e32cc0108cf2ef5de7a17f0f6c0aa9af7faf23ed (diff) |
gpu: nvgpu: nvgpu SGL implementation
The last major item preventing the core MM code in the nvgpu
driver from being platform agnostic is the usage of Linux
scattergather tables and scattergather lists. These data
structures are used throughout the mapping code to handle
discontiguous DMA allocations and also overloaded to represent
VIDMEM allocs.
The notion of a scatter gather table is crucial to a HW device
that can handle discontiguous DMA. The GPU has a MMU which
allows the GPU to do page gathering and present a virtually
contiguous buffer to the GPU HW. As a result it makes sense
for the GPU driver to use some sort of scatter gather concept
so maximize memory usage efficiency.
To that end this patch keeps the notion of a scatter gather
list but implements it in the nvgpu common code. It is based
heavily on the Linux SGL concept. It is a singly linked list
of blocks - each representing a chunk of memory. To map or
use a DMA allocation SW must iterate over each block in the
SGL.
This patch implements the most basic level of support for this
data structure. There are certainly easy optimizations that
could be done to speed up the current implementation. However,
this patches' goal is to simply divest the core MM code from
any last Linux'isms. Speed and efficiency come next.
Change-Id: Icf44641db22d87fa1d003debbd9f71b605258e42
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1530867
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gk20a/gk20a.h')
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/gk20a.h | 9 |
1 files changed, 4 insertions, 5 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.h b/drivers/gpu/nvgpu/gk20a/gk20a.h index 7eee2d51..355228db 100644 --- a/drivers/gpu/nvgpu/gk20a/gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/gk20a.h | |||
@@ -34,6 +34,7 @@ struct gk20a_debug_output; | |||
34 | struct nvgpu_clk_pll_debug_data; | 34 | struct nvgpu_clk_pll_debug_data; |
35 | struct nvgpu_nvhost_dev; | 35 | struct nvgpu_nvhost_dev; |
36 | struct nvgpu_cpu_time_correlation_sample; | 36 | struct nvgpu_cpu_time_correlation_sample; |
37 | struct nvgpu_mem_sgl; | ||
37 | 38 | ||
38 | #include <nvgpu/lock.h> | 39 | #include <nvgpu/lock.h> |
39 | #include <nvgpu/thread.h> | 40 | #include <nvgpu/thread.h> |
@@ -70,8 +71,6 @@ struct nvgpu_cpu_time_correlation_sample; | |||
70 | #endif | 71 | #endif |
71 | #include "ecc_gk20a.h" | 72 | #include "ecc_gk20a.h" |
72 | 73 | ||
73 | struct page_alloc_chunk; | ||
74 | |||
75 | /* PTIMER_REF_FREQ_HZ corresponds to a period of 32 nanoseconds. | 74 | /* PTIMER_REF_FREQ_HZ corresponds to a period of 32 nanoseconds. |
76 | 32 ns is the resolution of ptimer. */ | 75 | 32 ns is the resolution of ptimer. */ |
77 | #define PTIMER_REF_FREQ_HZ 31250000 | 76 | #define PTIMER_REF_FREQ_HZ 31250000 |
@@ -701,7 +700,7 @@ struct gpu_ops { | |||
701 | bool (*support_sparse)(struct gk20a *g); | 700 | bool (*support_sparse)(struct gk20a *g); |
702 | u64 (*gmmu_map)(struct vm_gk20a *vm, | 701 | u64 (*gmmu_map)(struct vm_gk20a *vm, |
703 | u64 map_offset, | 702 | u64 map_offset, |
704 | struct sg_table *sgt, | 703 | struct nvgpu_mem_sgl *sgl, |
705 | u64 buffer_offset, | 704 | u64 buffer_offset, |
706 | u64 size, | 705 | u64 size, |
707 | int pgsz_idx, | 706 | int pgsz_idx, |
@@ -761,9 +760,9 @@ struct gpu_ops { | |||
761 | size_t size); | 760 | size_t size); |
762 | struct { | 761 | struct { |
763 | u32 (*enter)(struct gk20a *g, struct nvgpu_mem *mem, | 762 | u32 (*enter)(struct gk20a *g, struct nvgpu_mem *mem, |
764 | struct page_alloc_chunk *chunk, u32 w); | 763 | struct nvgpu_mem_sgl *sgl, u32 w); |
765 | void (*exit)(struct gk20a *g, struct nvgpu_mem *mem, | 764 | void (*exit)(struct gk20a *g, struct nvgpu_mem *mem, |
766 | struct page_alloc_chunk *chunk); | 765 | struct nvgpu_mem_sgl *sgl); |
767 | u32 (*data032_r)(u32 i); | 766 | u32 (*data032_r)(u32 i); |
768 | } pramin; | 767 | } pramin; |
769 | struct { | 768 | struct { |