gpu: nvgpu: add gops.fifo.channel_suspend/channel_resume

RM Server acts differently for channel suspend/resume.

Jira VQRM-3058

Change-Id: If41e3099164654db448d1157fd7f51dd00c5e201
Signed-off-by: Richard Zhao <rizhao@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1679707
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

1 files changed, 7 insertions, 4 deletions

diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.c b/drivers/gpu/nvgpu/gk20a/gk20a.c
index 0206c915..64ae4401 100644
--- a/drivers/gpu/nvgpu/gk20a/gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/gk20a.c
@@ -91,9 +91,11 @@ int gk20a_prepare_poweroff(struct gk20a *g)
 
         gk20a_dbg_fn("");
 
-        ret = gk20a_channel_suspend(g);
-        if (ret)
-                return ret;
+        if (g->ops.fifo.channel_suspend) {
+                ret = g->ops.fifo.channel_suspend(g);
+                if (ret)
+                        return ret;
+        }
 
         /* disable elpg before gr or fifo suspend */
         if (g->ops.pmu.is_pmu_supported(g))
@@ -330,7 +332,8 @@ int gk20a_finalize_poweron(struct gk20a *g)
         }
 #endif
 
-        gk20a_channel_resume(g);
+        if (g->ops.fifo.channel_resume)
+                g->ops.fifo.channel_resume(g);
 
         nvgpu_init_mm_ce_context(g);