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authorDeepak Nibade <dnibade@nvidia.com>2016-08-17 12:31:43 -0400
committermobile promotions <svcmobile_promotions@nvidia.com>2016-09-08 12:43:51 -0400
commit70cad5fbb593602a49f91e57c04d1da0334b3a49 (patch)
tree12db73aa8275b15b8b9771d6d39590e2228db24f /drivers/gpu/nvgpu/gk20a/gk20a.c
parentf31e575ed6b048f2139eab0433cce7f18e670b28 (diff)
gpu: nvgpu: unify nvgpu and pci probe
We have completely different versions of probe for nvgpu and pci device Extract out common steps into nvgpu_probe() function and separate it out in new file nvgpu_common.c Divide task of nvgpu_probe() into further smaller functions Do platform specific things (like irq handling, memresource management, power management) only in individual probes and then call nvgpu_probe() to complete the common initialization Move all debugfs initialization to common gk20a_debug_init() This also helps to bringup all debug nodes to pci device Pass debugfs_symlink name as a parameter to gk20a_debug_init() This allows us to set separate debugfs symlink for nvgpu and pci device In case of railgating, cde and ce debugfs, check if platform supports them or not Copy vidmem_is_vidmem from platform to mm structure and set it to true for pci device Return from gk20a_scale_init() if we don't have either of governor or qos_notifier Fix gk20a_alloc_debugfs_init() and gk20a_secure_page_alloc() to receive device pointer instead of platform_device Export gk20a_railgating_debugfs_init() so that we can call it from gk20a_debug_init() Jira DNVGPU-56 Jira DNVGPU-58 Change-Id: I3cc048082b0a1e57415a9fb8bfb9eec0f0a280cd Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-on: http://git-master/r/1204207 (cherry picked from commit add6bb0a3d5bd98131bbe6f62d4358d4d722b0fe) Reviewed-on: http://git-master/r/1204462 GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gk20a/gk20a.c')
-rw-r--r--drivers/gpu/nvgpu/gk20a/gk20a.c177
1 files changed, 12 insertions, 165 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.c b/drivers/gpu/nvgpu/gk20a/gk20a.c
index 1fe1d330..f6bb9445 100644
--- a/drivers/gpu/nvgpu/gk20a/gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/gk20a.c
@@ -45,6 +45,7 @@
45#include <linux/version.h> 45#include <linux/version.h>
46 46
47#include "gk20a.h" 47#include "gk20a.h"
48#include "nvgpu_common.h"
48#include "debug_gk20a.h" 49#include "debug_gk20a.h"
49#include "ctrl_gk20a.h" 50#include "ctrl_gk20a.h"
50#include "hw_mc_gk20a.h" 51#include "hw_mc_gk20a.h"
@@ -83,8 +84,6 @@
83 84
84#define GK20A_NUM_CDEVS 7 85#define GK20A_NUM_CDEVS 7
85 86
86#define EMC3D_DEFAULT_RATIO 750
87
88#if defined(GK20A_DEBUG) 87#if defined(GK20A_DEBUG)
89u32 gk20a_dbg_mask = GK20A_DEFAULT_DBG_MASK; 88u32 gk20a_dbg_mask = GK20A_DEFAULT_DBG_MASK;
90u32 gk20a_dbg_ftrace; 89u32 gk20a_dbg_ftrace;
@@ -144,11 +143,14 @@ static const struct file_operations railgate_residency_fops = {
144 .release = single_release, 143 .release = single_release,
145}; 144};
146 145
147static int gk20a_railgating_debugfs_init(struct device *dev) 146int gk20a_railgating_debugfs_init(struct device *dev)
148{ 147{
149 struct dentry *d; 148 struct dentry *d;
150 struct gk20a_platform *platform = dev_get_drvdata(dev); 149 struct gk20a_platform *platform = dev_get_drvdata(dev);
151 150
151 if (!platform->can_railgate)
152 return 0;
153
152 d = debugfs_create_file( 154 d = debugfs_create_file(
153 "railgate_residency", S_IRUGO|S_IWUSR, platform->debugfs, dev, 155 "railgate_residency", S_IRUGO|S_IWUSR, platform->debugfs, dev,
154 &railgate_residency_fops); 156 &railgate_residency_fops);
@@ -740,32 +742,15 @@ static int gk20a_init_support(struct platform_device *dev)
740 goto fail; 742 goto fail;
741 } 743 }
742 744
743 g->regs_saved = g->regs;
744 g->bar1_saved = g->bar1;
745
746 /* Get interrupt numbers */
747 g->irq_nonstall = platform_get_irq(dev, 1);
748 if (g->irq_stall < 0 || g->irq_nonstall < 0) {
749 err = -ENXIO;
750 goto fail;
751 }
752
753 if (tegra_cpu_is_asim()) { 745 if (tegra_cpu_is_asim()) {
754 err = gk20a_init_sim_support(dev); 746 err = gk20a_init_sim_support(dev);
755 if (err) 747 if (err)
756 goto fail; 748 goto fail;
757 } 749 }
758 750
759 mutex_init(&g->dbg_sessions_lock);
760 mutex_init(&g->client_lock);
761 mutex_init(&g->ch_wdt_lock);
762 mutex_init(&g->poweroff_lock);
763
764 g->remove_support = gk20a_remove_support;
765 return 0; 751 return 0;
766 752
767 fail: 753 fail:
768 gk20a_remove_support(&dev->dev);
769 return err; 754 return err;
770} 755}
771 756
@@ -1449,13 +1434,13 @@ int gk20a_pm_init(struct device *dev)
1449 return err; 1434 return err;
1450} 1435}
1451 1436
1452static int gk20a_secure_page_alloc(struct platform_device *pdev) 1437int gk20a_secure_page_alloc(struct device *dev)
1453{ 1438{
1454 struct gk20a_platform *platform = platform_get_drvdata(pdev); 1439 struct gk20a_platform *platform = dev_get_drvdata(dev);
1455 int err = 0; 1440 int err = 0;
1456 1441
1457 if (platform->secure_page_alloc) { 1442 if (platform->secure_page_alloc) {
1458 err = platform->secure_page_alloc(&pdev->dev); 1443 err = platform->secure_page_alloc(dev);
1459 if (!err) 1444 if (!err)
1460 platform->secure_alloc_ready = true; 1445 platform->secure_alloc_ready = true;
1461 } 1446 }
@@ -1499,9 +1484,6 @@ static int gk20a_probe(struct platform_device *dev)
1499 return -ENOMEM; 1484 return -ENOMEM;
1500 } 1485 }
1501 1486
1502 init_waitqueue_head(&gk20a->sw_irq_stall_last_handled_wq);
1503 init_waitqueue_head(&gk20a->sw_irq_nonstall_last_handled_wq);
1504
1505 set_gk20a(dev, gk20a); 1487 set_gk20a(dev, gk20a);
1506 gk20a->dev = &dev->dev; 1488 gk20a->dev = &dev->dev;
1507 1489
@@ -1509,6 +1491,7 @@ static int gk20a_probe(struct platform_device *dev)
1509 gk20a->irq_nonstall = platform_get_irq(dev, 1); 1491 gk20a->irq_nonstall = platform_get_irq(dev, 1);
1510 if (gk20a->irq_stall < 0 || gk20a->irq_nonstall < 0) 1492 if (gk20a->irq_stall < 0 || gk20a->irq_nonstall < 0)
1511 return -ENXIO; 1493 return -ENXIO;
1494
1512 err = devm_request_threaded_irq(&dev->dev, 1495 err = devm_request_threaded_irq(&dev->dev,
1513 gk20a->irq_stall, 1496 gk20a->irq_stall,
1514 gk20a_intr_isr_stall, 1497 gk20a_intr_isr_stall,
@@ -1535,36 +1518,19 @@ static int gk20a_probe(struct platform_device *dev)
1535 if (gk20a->irq_stall != gk20a->irq_nonstall) 1518 if (gk20a->irq_stall != gk20a->irq_nonstall)
1536 disable_irq(gk20a->irq_nonstall); 1519 disable_irq(gk20a->irq_nonstall);
1537 1520
1538 err = gk20a_user_init(&dev->dev, INTERFACE_NAME, &nvgpu_class); 1521 err = gk20a_init_support(dev);
1539 if (err) 1522 if (err)
1540 return err; 1523 return err;
1541 1524
1542 gk20a_init_support(dev);
1543
1544 init_rwsem(&gk20a->busy_lock);
1545 mutex_init(&platform->railgate_lock);
1546
1547 spin_lock_init(&gk20a->mc_enable_lock);
1548
1549#ifdef CONFIG_RESET_CONTROLLER 1525#ifdef CONFIG_RESET_CONTROLLER
1550 platform->reset_control = devm_reset_control_get(&dev->dev, NULL); 1526 platform->reset_control = devm_reset_control_get(&dev->dev, NULL);
1551 if (IS_ERR(platform->reset_control)) 1527 if (IS_ERR(platform->reset_control))
1552 platform->reset_control = NULL; 1528 platform->reset_control = NULL;
1553#endif 1529#endif
1554 1530
1555 gk20a_debug_init(&dev->dev); 1531 err = nvgpu_probe(gk20a, "gpu.0", INTERFACE_NAME, &nvgpu_class);
1556
1557 /* Initialize the platform interface. */
1558 err = platform->probe(&dev->dev);
1559 if (err) {
1560 dev_err(&dev->dev, "platform probe failed");
1561 return err;
1562 }
1563
1564 err = gk20a_secure_page_alloc(dev);
1565 if (err) 1532 if (err)
1566 dev_err(&dev->dev, 1533 return err;
1567 "failed to allocate secure buffer %d\n", err);
1568 1534
1569 err = gk20a_pm_init(&dev->dev); 1535 err = gk20a_pm_init(&dev->dev);
1570 if (err) { 1536 if (err) {
@@ -1572,127 +1538,8 @@ static int gk20a_probe(struct platform_device *dev)
1572 return err; 1538 return err;
1573 } 1539 }
1574 1540
1575 gk20a->emc3d_ratio = EMC3D_DEFAULT_RATIO;
1576
1577 /* Initialise scaling */
1578 if (IS_ENABLED(CONFIG_GK20A_DEVFREQ))
1579 gk20a_scale_init(&dev->dev);
1580
1581 /* Set DMA parameters to allow larger sgt lists */
1582 dev->dev.dma_parms = &gk20a->dma_parms;
1583 dma_set_max_seg_size(&dev->dev, UINT_MAX);
1584
1585 gk20a->gr_idle_timeout_default =
1586 CONFIG_GK20A_DEFAULT_TIMEOUT;
1587 if (tegra_platform_is_silicon())
1588 gk20a->timeouts_enabled = true;
1589
1590 gk20a->runlist_interleave = true;
1591
1592 gk20a->timeslice_low_priority_us = 1300;
1593 gk20a->timeslice_medium_priority_us = 2600;
1594 gk20a->timeslice_high_priority_us = 5200;
1595
1596 /* Set up initial power settings. For non-slicon platforms, disable *
1597 * power features and for silicon platforms, read from platform data */
1598 gk20a->slcg_enabled =
1599 tegra_platform_is_silicon() ? platform->enable_slcg : false;
1600 gk20a->blcg_enabled =
1601 tegra_platform_is_silicon() ? platform->enable_blcg : false;
1602 gk20a->elcg_enabled =
1603 tegra_platform_is_silicon() ? platform->enable_elcg : false;
1604 gk20a->elpg_enabled =
1605 tegra_platform_is_silicon() ? platform->enable_elpg : false;
1606 gk20a->aelpg_enabled =
1607 tegra_platform_is_silicon() ? platform->enable_aelpg : false;
1608
1609 /* set default values to aelpg parameters */
1610 gk20a->pmu.aelpg_param[0] = APCTRL_SAMPLING_PERIOD_PG_DEFAULT_US;
1611 gk20a->pmu.aelpg_param[1] = APCTRL_MINIMUM_IDLE_FILTER_DEFAULT_US;
1612 gk20a->pmu.aelpg_param[2] = APCTRL_MINIMUM_TARGET_SAVING_DEFAULT_US;
1613 gk20a->pmu.aelpg_param[3] = APCTRL_POWER_BREAKEVEN_DEFAULT_US;
1614 gk20a->pmu.aelpg_param[4] = APCTRL_CYCLES_PER_SAMPLE_MAX_DEFAULT;
1615
1616 if (platform->late_probe) {
1617 err = platform->late_probe(&dev->dev);
1618 if (err) {
1619 dev_err(&dev->dev, "late probe failed");
1620 return err;
1621 }
1622 }
1623
1624 gk20a_create_sysfs(&dev->dev);
1625
1626 gk20a->mm.bypass_smmu = platform->bypass_smmu;
1627 gk20a->mm.disable_bigpage = platform->disable_bigpage;
1628 gk20a->mm.has_physical_mode = !is_tegra_hypervisor_mode(); 1541 gk20a->mm.has_physical_mode = !is_tegra_hypervisor_mode();
1629 1542
1630#ifdef CONFIG_DEBUG_FS
1631 spin_lock_init(&gk20a->debugfs_lock);
1632 gk20a->mm.ltc_enabled = true;
1633 gk20a->mm.ltc_enabled_debug = true;
1634 gk20a->debugfs_ltc_enabled =
1635 debugfs_create_bool("ltc_enabled", S_IRUGO|S_IWUSR,
1636 platform->debugfs,
1637 &gk20a->mm.ltc_enabled_debug);
1638 gk20a->mm.ltc_enabled_debug = true;
1639 gk20a->debugfs_gr_idle_timeout_default =
1640 debugfs_create_u32("gr_idle_timeout_default_us",
1641 S_IRUGO|S_IWUSR, platform->debugfs,
1642 &gk20a->gr_idle_timeout_default);
1643 gk20a->debugfs_timeouts_enabled =
1644 debugfs_create_bool("timeouts_enabled",
1645 S_IRUGO|S_IWUSR,
1646 platform->debugfs,
1647 &gk20a->timeouts_enabled);
1648 gk20a->debugfs_bypass_smmu =
1649 debugfs_create_bool("bypass_smmu",
1650 S_IRUGO|S_IWUSR,
1651 platform->debugfs,
1652 &gk20a->mm.bypass_smmu);
1653 gk20a->debugfs_disable_bigpage =
1654 debugfs_create_bool("disable_bigpage",
1655 S_IRUGO|S_IWUSR,
1656 platform->debugfs,
1657 &gk20a->mm.disable_bigpage);
1658
1659 gk20a->debugfs_timeslice_low_priority_us =
1660 debugfs_create_u32("timeslice_low_priority_us",
1661 S_IRUGO|S_IWUSR,
1662 platform->debugfs,
1663 &gk20a->timeslice_low_priority_us);
1664
1665 gk20a->debugfs_timeslice_medium_priority_us =
1666 debugfs_create_u32("timeslice_medium_priority_us",
1667 S_IRUGO|S_IWUSR,
1668 platform->debugfs,
1669 &gk20a->timeslice_medium_priority_us);
1670
1671 gk20a->debugfs_timeslice_high_priority_us =
1672 debugfs_create_u32("timeslice_high_priority_us",
1673 S_IRUGO|S_IWUSR,
1674 platform->debugfs,
1675 &gk20a->timeslice_high_priority_us);
1676
1677 gk20a->debugfs_runlist_interleave =
1678 debugfs_create_bool("runlist_interleave",
1679 S_IRUGO|S_IWUSR,
1680 platform->debugfs,
1681 &gk20a->runlist_interleave);
1682
1683 gr_gk20a_debugfs_init(gk20a);
1684 gk20a_pmu_debugfs_init(&dev->dev);
1685 gk20a_railgating_debugfs_init(&dev->dev);
1686 gk20a_cde_debugfs_init(&dev->dev);
1687 gk20a_ce_debugfs_init(&dev->dev);
1688 gk20a_alloc_debugfs_init(dev);
1689 gk20a_mm_debugfs_init(&dev->dev);
1690 gk20a_fifo_debugfs_init(&dev->dev);
1691 gk20a_sched_debugfs_init(&dev->dev);
1692#endif
1693
1694 gk20a_init_gr(gk20a);
1695
1696 return 0; 1543 return 0;
1697} 1544}
1698 1545