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authorNicolas Benech <nbenech@nvidia.com>2018-08-23 16:23:52 -0400
committermobile promotions <svcmobile_promotions@nvidia.com>2018-09-05 23:39:08 -0400
commit2eface802a4aea417206bcdda689a65cf47d300b (patch)
tree502af9d48004af4edf8f02a2a7cf751ef5a11325 /drivers/gpu/nvgpu/gk20a/gk20a.c
parentb44c7fdb114a63ab98fffc0f246776b56399ff64 (diff)
gpu: nvgpu: Fix mutex MISRA 17.7 violations
MISRA Rule-17.7 requires the return value of all functions to be used. Fix is either to use the return value or change the function to return void. This patch contains fix for calls to nvgpu_mutex_init and improves related error handling. JIRA NVGPU-677 Change-Id: I609fa138520cc7ccfdd5aa0e7fd28c8ca0b3a21c Signed-off-by: Nicolas Benech <nbenech@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1805598 Reviewed-by: svc-misra-checker <svc-misra-checker@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Alex Waterman <alexw@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gk20a/gk20a.c')
-rw-r--r--drivers/gpu/nvgpu/gk20a/gk20a.c20
1 files changed, 16 insertions, 4 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.c b/drivers/gpu/nvgpu/gk20a/gk20a.c
index f5e35927..1c34c152 100644
--- a/drivers/gpu/nvgpu/gk20a/gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/gk20a.c
@@ -150,7 +150,7 @@ int gk20a_prepare_poweroff(struct gk20a *g)
150 150
151int gk20a_finalize_poweron(struct gk20a *g) 151int gk20a_finalize_poweron(struct gk20a *g)
152{ 152{
153 int err; 153 int err = 0;
154#if defined(CONFIG_TEGRA_GK20A_NVHOST) 154#if defined(CONFIG_TEGRA_GK20A_NVHOST)
155 u32 nr_pages; 155 u32 nr_pages;
156#endif 156#endif
@@ -182,9 +182,21 @@ int gk20a_finalize_poweron(struct gk20a *g)
182 } 182 }
183 183
184 /* init interface layer support for PMU falcon */ 184 /* init interface layer support for PMU falcon */
185 nvgpu_flcn_sw_init(g, FALCON_ID_PMU); 185 err = nvgpu_flcn_sw_init(g, FALCON_ID_PMU);
186 nvgpu_flcn_sw_init(g, FALCON_ID_SEC2); 186 if (err != 0) {
187 nvgpu_flcn_sw_init(g, FALCON_ID_NVDEC); 187 nvgpu_err(g, "failed to sw init FALCON_ID_PMU");
188 goto done;
189 }
190 err = nvgpu_flcn_sw_init(g, FALCON_ID_SEC2);
191 if (err != 0) {
192 nvgpu_err(g, "failed to sw init FALCON_ID_SEC2");
193 goto done;
194 }
195 err = nvgpu_flcn_sw_init(g, FALCON_ID_NVDEC);
196 if (err != 0) {
197 nvgpu_err(g, "failed to sw init FALCON_ID_NVDEC");
198 goto done;
199 }
188 200
189 if (g->ops.bios.init) { 201 if (g->ops.bios.init) {
190 err = g->ops.bios.init(g); 202 err = g->ops.bios.init(g);