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authorAingara Paramakuru <aparamakuru@nvidia.com>2016-02-22 12:35:49 -0500
committerTerje Bergstrom <tbergstrom@nvidia.com>2016-03-15 19:23:44 -0400
commit2a58d3c27b45ca9d0d9dc2136377b7a41b9ed82d (patch)
tree9d7464bfd0eea8e4b65f591996db59a98f4070e2 /drivers/gpu/nvgpu/gk20a/gk20a.c
parentf07a046a52e7a8074bd1572a12ac65747d3f827d (diff)
gpu: nvgpu: improve channel interleave support
Previously, only "high" priority bare channels were interleaved between all other bare channels and TSGs. This patch decouples priority from interleaving and introduces 3 levels for interleaving a bare channel or TSG: high, medium, and low. The levels define the number of times a channel or TSG will appear on a runlist (see nvgpu.h for details). By default, all bare channels and TSGs are set to interleave level low. Userspace can then request the interleave level to be increased via the CHANNEL_SET_RUNLIST_INTERLEAVE ioctl (TSG-specific ioctl will be added later). As timeslice settings will soon be coming from userspace, the default timeslice for "high" priority channels has been restored. JIRA VFND-1302 Bug 1729664 Change-Id: I178bc1cecda23f5002fec6d791e6dcaedfa05c0c Signed-off-by: Aingara Paramakuru <aparamakuru@nvidia.com> Reviewed-on: http://git-master/r/1014962 Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gk20a/gk20a.c')
-rw-r--r--drivers/gpu/nvgpu/gk20a/gk20a.c16
1 files changed, 5 insertions, 11 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.c b/drivers/gpu/nvgpu/gk20a/gk20a.c
index fa2c61e1..0fee58e8 100644
--- a/drivers/gpu/nvgpu/gk20a/gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/gk20a.c
@@ -672,9 +672,6 @@ static int gk20a_init_support(struct platform_device *dev)
672 mutex_init(&g->ch_wdt_lock); 672 mutex_init(&g->ch_wdt_lock);
673 mutex_init(&g->poweroff_lock); 673 mutex_init(&g->poweroff_lock);
674 674
675 mutex_init(&g->interleave_lock);
676 g->num_interleaved_channels = 0;
677
678 g->remove_support = gk20a_remove_support; 675 g->remove_support = gk20a_remove_support;
679 return 0; 676 return 0;
680 677
@@ -1439,14 +1436,11 @@ static int gk20a_probe(struct platform_device *dev)
1439 if (tegra_platform_is_silicon()) 1436 if (tegra_platform_is_silicon())
1440 gk20a->timeouts_enabled = true; 1437 gk20a->timeouts_enabled = true;
1441 1438
1442 gk20a->interleave_high_priority = true; 1439 gk20a->runlist_interleave = true;
1443 1440
1444 gk20a->timeslice_low_priority_us = 1300; 1441 gk20a->timeslice_low_priority_us = 1300;
1445 gk20a->timeslice_medium_priority_us = 2600; 1442 gk20a->timeslice_medium_priority_us = 2600;
1446 if (gk20a->interleave_high_priority) 1443 gk20a->timeslice_high_priority_us = 5200;
1447 gk20a->timeslice_high_priority_us = 3000;
1448 else
1449 gk20a->timeslice_high_priority_us = 5200;
1450 1444
1451 /* Set up initial power settings. For non-slicon platforms, disable * 1445 /* Set up initial power settings. For non-slicon platforms, disable *
1452 * power features and for silicon platforms, read from platform data */ 1446 * power features and for silicon platforms, read from platform data */
@@ -1527,11 +1521,11 @@ static int gk20a_probe(struct platform_device *dev)
1527 platform->debugfs, 1521 platform->debugfs,
1528 &gk20a->timeslice_high_priority_us); 1522 &gk20a->timeslice_high_priority_us);
1529 1523
1530 gk20a->debugfs_interleave_high_priority = 1524 gk20a->debugfs_runlist_interleave =
1531 debugfs_create_bool("interleave_high_priority", 1525 debugfs_create_bool("runlist_interleave",
1532 S_IRUGO|S_IWUSR, 1526 S_IRUGO|S_IWUSR,
1533 platform->debugfs, 1527 platform->debugfs,
1534 &gk20a->interleave_high_priority); 1528 &gk20a->runlist_interleave);
1535 1529
1536 gr_gk20a_debugfs_init(gk20a); 1530 gr_gk20a_debugfs_init(gk20a);
1537 gk20a_pmu_debugfs_init(dev); 1531 gk20a_pmu_debugfs_init(dev);