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authorMahantesh Kumbar <mkumbar@nvidia.com>2017-07-05 06:42:29 -0400
committermobile promotions <svcmobile_promotions@nvidia.com>2017-07-06 02:25:27 -0400
commit79a79b8ae6987e5620c9bc7ee080fe637a6ca57b (patch)
tree5e482d8d1a584e9496b2daa880adfd00b5f65ecb /drivers/gpu/nvgpu/gk20a/flcn_gk20a.c
parent3afac13d66ee7026555c0b0558d898a4f189b051 (diff)
gpu: nvgpu: falcon bootstrap support
- Added falcon interface/HAL to bootstrap falcon by taking boot vector as parameter - Replaced falcon bootstrap code in multiple files with nvgpu_flcn_bootstrap() method JIRA NVGPU-102 Change-Id: I4324824c50c6196d8b7ecf981f815ec778da2fd9 Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com> Reviewed-on: https://git-master/r/1513643 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gk20a/flcn_gk20a.c')
-rw-r--r--drivers/gpu/nvgpu/gk20a/flcn_gk20a.c23
1 files changed, 22 insertions, 1 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/flcn_gk20a.c b/drivers/gpu/nvgpu/gk20a/flcn_gk20a.c
index 158f4d8b..0ef10a56 100644
--- a/drivers/gpu/nvgpu/gk20a/flcn_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/flcn_gk20a.c
@@ -324,6 +324,26 @@ static int gk20a_flcn_copy_to_imem(struct nvgpu_falcon *flcn, u32 dst,
324 return 0; 324 return 0;
325} 325}
326 326
327static int gk20a_falcon_bootstrap(struct nvgpu_falcon *flcn,
328 u32 boot_vector)
329{
330 struct gk20a *g = flcn->g;
331 u32 base_addr = flcn->flcn_base;
332
333 nvgpu_log_info(g, "boot vec 0x%x", boot_vector);
334
335 gk20a_writel(g, base_addr + falcon_falcon_dmactl_r(),
336 falcon_falcon_dmactl_require_ctx_f(0));
337
338 gk20a_writel(g, base_addr + falcon_falcon_bootvec_r(),
339 falcon_falcon_bootvec_vec_f(boot_vector));
340
341 gk20a_writel(g, base_addr + falcon_falcon_cpuctl_r(),
342 falcon_falcon_cpuctl_startcpu_f(1));
343
344 return 0;
345}
346
327static void gk20a_falcon_engine_dependency_ops(struct nvgpu_falcon *flcn) 347static void gk20a_falcon_engine_dependency_ops(struct nvgpu_falcon *flcn)
328{ 348{
329 struct nvgpu_falcon_engine_dependency_ops *flcn_eng_dep_ops = 349 struct nvgpu_falcon_engine_dependency_ops *flcn_eng_dep_ops =
@@ -357,6 +377,7 @@ void gk20a_falcon_ops(struct nvgpu_falcon *flcn)
357 flcn_ops->copy_from_dmem = gk20a_flcn_copy_from_dmem; 377 flcn_ops->copy_from_dmem = gk20a_flcn_copy_from_dmem;
358 flcn_ops->copy_to_dmem = gk20a_flcn_copy_to_dmem; 378 flcn_ops->copy_to_dmem = gk20a_flcn_copy_to_dmem;
359 flcn_ops->copy_to_imem = gk20a_flcn_copy_to_imem; 379 flcn_ops->copy_to_imem = gk20a_flcn_copy_to_imem;
380 flcn_ops->bootstrap = gk20a_falcon_bootstrap;
360 381
361 gk20a_falcon_engine_dependency_ops(flcn); 382 gk20a_falcon_engine_dependency_ops(flcn);
362} 383}
@@ -396,7 +417,7 @@ static void gk20a_falcon_hal_sw_init(struct nvgpu_falcon *flcn)
396 nvgpu_mutex_init(&flcn->copy_lock); 417 nvgpu_mutex_init(&flcn->copy_lock);
397 gk20a_falcon_ops(flcn); 418 gk20a_falcon_ops(flcn);
398 } else 419 } else
399 nvgpu_info(g, "falcon 0x%x not supported on %s", 420 nvgpu_log_info(g, "falcon 0x%x not supported on %s",
400 flcn->flcn_id, g->name); 421 flcn->flcn_id, g->name);
401} 422}
402 423