gpu: nvgpu: PMU reset reorg

- nvgpu_pmu_reset() as pmu reset for
all chips & removed gk20a_pmu_reset() &
gp106_pmu_reset() along with dependent
code.

- Created ops to do PMU engine reset & to
know the engine reset status

- Removed pmu.reset ops & replaced with
nvgpu_flcn_reset(pmu->flcn)

- Moved sec2 reset to sec2_gp106 from
pmu_gp106 & cleaned PMU code part of sec2.

JIRA NVGPU-99

Change-Id: I7575e4ca2b34922d73d171f6a41bfcdc2f40dc96
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: https://git-master/r/1507881
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

1 files changed, 2 insertions, 1 deletions

diff --git a/drivers/gpu/nvgpu/gk20a/flcn_gk20a.c b/drivers/gpu/nvgpu/gk20a/flcn_gk20a.c
index 9d378248..2a246fdc 100644
--- a/drivers/gpu/nvgpu/gk20a/flcn_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/flcn_gk20a.c
@@ -11,6 +11,7 @@
  * more details.
  */
 #include <nvgpu/falcon.h>
+#include <nvgpu/pmu.h>
 
 #include "gk20a/gk20a.h"
 
@@ -256,7 +257,7 @@ static void gk20a_falcon_engine_dependency_ops(struct nvgpu_falcon *flcn)
 
         switch (flcn->flcn_id) {
         case FALCON_ID_PMU:
-                flcn_eng_dep_ops->reset_eng = gk20a_pmu_reset;
+                flcn_eng_dep_ops->reset_eng = nvgpu_pmu_reset;
                 break;
         default:
                 /* NULL assignment make sure