gpu: nvgpu: MISRA 10.4 enum fixes

MISRA rule-10.4 only allows arithmetic conversions on operands of the
same essential type category.

Fix violations where an arithmetic conversion is performed on enum and
non-enum types.

JIRA NVGPU-993

Change-Id: I5391bb670d68982e0b5af6600995f70fe0cb2ad3
Signed-off-by: Amulya <Amurthyreddy@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1792852
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

1 files changed, 3 insertions, 2 deletions

diff --git a/drivers/gpu/nvgpu/gk20a/flcn_gk20a.c b/drivers/gpu/nvgpu/gk20a/flcn_gk20a.c
index 98fdb8c2..92f88333 100644
--- a/drivers/gpu/nvgpu/gk20a/flcn_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/flcn_gk20a.c
@@ -139,7 +139,8 @@ static bool gk20a_is_falcon_scrubbing_done(struct nvgpu_falcon *flcn)
         return status;
 }
 
-static u32 gk20a_falcon_get_mem_size(struct nvgpu_falcon *flcn, u32 mem_type)
+static u32 gk20a_falcon_get_mem_size(struct nvgpu_falcon *flcn,
+                enum flcn_mem_type mem_type)
 {
         struct gk20a *g = flcn->g;
         u32 mem_size = 0;
@@ -157,7 +158,7 @@ static u32 gk20a_falcon_get_mem_size(struct nvgpu_falcon *flcn, u32 mem_type)
 }
 
 static int flcn_mem_overflow_check(struct nvgpu_falcon *flcn,
-                u32 offset, u32 size, u32 mem_type)
+                u32 offset, u32 size, enum flcn_mem_type mem_type)
 {
         struct gk20a *g = flcn->g;
         u32 mem_size = 0;