gpu: nvgpu: *ERROR_MMU_ERR_FLT* not set for fake mmu faults

For fake faults, errror notifiers are expected to be set
before triggering fake mmu fault.

JIRA GPUT19X-7

Change-Id: I458af8d95c5960f20693b6923e1990fe3aa59857
Signed-off-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-on: http://git-master/r/1323413
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

1 files changed, 5 insertions, 3 deletions

diff --git a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.h b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.h
index eab57ba3..ae728a36 100644
--- a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.h
+++ b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.h
@@ -270,11 +270,13 @@ u32 gk20a_fifo_engine_interrupt_mask(struct gk20a *g);
 u32 gk20a_fifo_get_pbdma_signature(struct gk20a *g);
 u32 gk20a_fifo_get_failing_engine_data(struct gk20a *g,
                 int *__id, bool *__is_tsg);
-bool gk20a_fifo_set_ctx_mmu_error_tsg(struct gk20a *g,
+void gk20a_fifo_set_ctx_mmu_error_tsg(struct gk20a *g,
                 struct tsg_gk20a *tsg);
 void gk20a_fifo_abort_tsg(struct gk20a *g, u32 tsgid, bool preempt);
-bool gk20a_fifo_set_ctx_mmu_error_ch(struct gk20a *g,
-                struct channel_gk20a *ch);
+void gk20a_fifo_set_ctx_mmu_error_ch(struct gk20a *g,
+                struct channel_gk20a *refch);
+bool gk20a_fifo_error_tsg(struct gk20a *g, struct tsg_gk20a *tsg);
+bool gk20a_fifo_error_ch(struct gk20a *g, struct channel_gk20a *refch);
 
 struct channel_gk20a *gk20a_fifo_channel_from_hw_chid(struct gk20a *g,
                 u32 hw_chid);