summaryrefslogtreecommitdiffstats
path: root/drivers/gpu/nvgpu/gk20a/fifo_gk20a.h
diff options
context:
space:
mode:
authorThomas Fleury <tfleury@nvidia.com>2017-04-19 19:47:13 -0400
committermobile promotions <svcmobile_promotions@nvidia.com>2017-05-24 07:55:36 -0400
commitb03afb6d5c4bbca5a26cc95027491c816e5e1f6d (patch)
treeb59ae1b881877cf52ca921a5bf9d884f78fac648 /drivers/gpu/nvgpu/gk20a/fifo_gk20a.h
parenta823c72219d3bb96bc9489e84b64e0038e7119d7 (diff)
gpu: nvgpu: add ioctls to get current timeslice
Add the following ioctls - NVGPU_CHANNEL_IOCTL_GET_TIMESLICE for channel timeslice in us - NVGPU_TSG_IOCTL_GET_TIMESLICE for TSG timeslice in us If timeslice has not been set explicitly, ioctl returns the default timeslice that will be used when programming the runlist entry. Bug 1883271 Change-Id: Ib18fdd836323b1a2d4efceb1e27d07713bd6fca5 Signed-off-by: Thomas Fleury <tfleury@nvidia.com> Reviewed-on: http://git-master/r/1469040 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gk20a/fifo_gk20a.h')
-rw-r--r--drivers/gpu/nvgpu/gk20a/fifo_gk20a.h5
1 files changed, 5 insertions, 0 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.h b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.h
index 0bec9e82..b09fde65 100644
--- a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.h
+++ b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.h
@@ -47,6 +47,9 @@
47#define RC_TYPE_PBDMA_FAULT 2 47#define RC_TYPE_PBDMA_FAULT 2
48#define RC_TYPE_NO_RC 0xff 48#define RC_TYPE_NO_RC 0xff
49 49
50#define NVGPU_FIFO_DEFAULT_TIMESLICE_TIMEOUT 128UL
51#define NVGPU_FIFO_DEFAULT_TIMESLICE_SCALE 3UL
52
50/* 53/*
51 * Number of entries in the kickoff latency buffer, used to calculate 54 * Number of entries in the kickoff latency buffer, used to calculate
52 * the profiling and histogram. This number is calculated to be statistically 55 * the profiling and histogram. This number is calculated to be statistically
@@ -399,4 +402,6 @@ void gk20a_fifo_reset_pbdma_method(struct gk20a *g, int pbdma_id,
399 int pbdma_method_index); 402 int pbdma_method_index);
400unsigned int gk20a_fifo_handle_pbdma_intr_0(struct gk20a *g, u32 pbdma_id, 403unsigned int gk20a_fifo_handle_pbdma_intr_0(struct gk20a *g, u32 pbdma_id,
401 u32 pbdma_intr_0, u32 *handled, u32 *error_notifier); 404 u32 pbdma_intr_0, u32 *handled, u32 *error_notifier);
405
406u32 gk20a_fifo_default_timeslice_us(struct gk20a *g);
402#endif /*__GR_GK20A_H__*/ 407#endif /*__GR_GK20A_H__*/