gpu: nvgpu: use common nvgpu mutex/spinlock APIs

Instead of using Linux APIs for mutex and spinlocks
directly, use new APIs defined in <nvgpu/lock.h>

Replace Linux specific mutex/spinlock declaration,
init, lock, unlock APIs with new APIs
e.g
struct mutex is replaced by struct nvgpu_mutex and
mutex_lock() is replaced by nvgpu_mutex_acquire()

And also include <nvgpu/lock.h> instead of including
<linux/mutex.h> and <linux/spinlock.h>

Add explicit nvgpu/lock.h includes to below
files to fix complilation failures.
gk20a/platform_gk20a.h
include/nvgpu/allocator.h

Jira NVGPU-13

Change-Id: I81a05d21ecdbd90c2076a9f0aefd0e40b215bd33
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/1293187
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

1 files changed, 6 insertions, 6 deletions

diff --git a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.h b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.h
index 20baf9de..1a248dba 100644
--- a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.h
+++ b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.h
@@ -41,7 +41,7 @@ struct fifo_runlist_info_gk20a {
         u32  total_entries;
         bool stopped;
         bool support_tsg;
-        struct mutex mutex; /* protect channel preempt and runlist upate */
+        struct nvgpu_mutex mutex; /* protect channel preempt and runlist update */
 };
 
 enum {
@@ -120,18 +120,18 @@ struct fifo_gk20a {
         struct channel_gk20a *channel;
         /* zero-kref'd channels here */
         struct list_head free_chs;
-        struct mutex free_chs_mutex;
-        struct mutex gr_reset_mutex;
+        struct nvgpu_mutex free_chs_mutex;
+        struct nvgpu_mutex gr_reset_mutex;
 
         struct tsg_gk20a *tsg;
-        struct mutex tsg_inuse_mutex;
+        struct nvgpu_mutex tsg_inuse_mutex;
 
         void (*remove_support)(struct fifo_gk20a *);
         bool sw_ready;
         struct {
                 /* share info between isrs and non-isr code */
                 struct {
-                        struct mutex mutex;
+                        struct nvgpu_mutex mutex;
                 } isr;
                 struct {
                         u32 device_fatal_0;
@@ -147,7 +147,7 @@ struct fifo_gk20a {
 
         unsigned long deferred_fault_engines;
         bool deferred_reset_pending;
-        struct mutex deferred_reset_mutex;
+        struct nvgpu_mutex deferred_reset_mutex;
 };
 
 static inline const char *gk20a_fifo_interleave_level_name(u32 interleave_level)