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authorDebarshi Dutta <ddutta@nvidia.com>2019-04-30 05:41:31 -0400
committermobile promotions <svcmobile_promotions@nvidia.com>2019-05-09 17:42:33 -0400
commit6509bb49da19ba9b19e3df64e473b01d54fd310d (patch)
treeb34d19c88fc122f369b1f22094d9a5e22c67df92 /drivers/gpu/nvgpu/gk20a/fifo_gk20a.h
parent4d8ad643d67ac4044f76976c4085a35fcc5d4095 (diff)
gpu: nvgpu: protect recovery with engines_reset_mutex
Rename gr_reset_mutex to engines_reset_mutex and acquire it before initiating recovery. Recovery running in parallel with engine reset is not recommended. On hitting engine reset, h/w drops the ctxsw_status to INVALID in fifo_engine_status register. Also while the engine is held in reset h/w passes busy/idle straight through. fifo_engine_status registers are correct in that there is no context switch outstanding as the CTXSW is aborted when reset is asserted. Use deferred_reset_mutex to protect deferred_reset_pending variable If deferred_reset_pending is true then acquire engines_reset_mutex and call gk20a_fifo_deferred_reset. gk20a_fifo_deferred_reset would also check the value of deferred_reset_pending before initiating reset process Bug 2092051 Bug 2429295 Bug 2484211 Bug 1890287 Change-Id: I47de669a6203e0b2e9a8237ec4e4747339b9837c Signed-off-by: Seema Khowala <seemaj@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/2022373 Signed-off-by: Debarshi Dutta <ddutta@nvidia.com> (cherry-picked from cb91bf1e13740023903282d1c2271d9154e940ba in dev-main) Reviewed-on: https://git-master.nvidia.com/r/2024901 GVS: Gerrit_Virtual_Submit Reviewed-by: Bibek Basu <bbasu@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gk20a/fifo_gk20a.h')
-rw-r--r--drivers/gpu/nvgpu/gk20a/fifo_gk20a.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.h b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.h
index 0c9d9101..26365cae 100644
--- a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.h
+++ b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.h
@@ -184,7 +184,7 @@ struct fifo_gk20a {
184 /* zero-kref'd channels here */ 184 /* zero-kref'd channels here */
185 struct nvgpu_list_node free_chs; 185 struct nvgpu_list_node free_chs;
186 struct nvgpu_mutex free_chs_mutex; 186 struct nvgpu_mutex free_chs_mutex;
187 struct nvgpu_mutex gr_reset_mutex; 187 struct nvgpu_mutex engines_reset_mutex;
188 188
189 struct tsg_gk20a *tsg; 189 struct tsg_gk20a *tsg;
190 struct nvgpu_mutex tsg_inuse_mutex; 190 struct nvgpu_mutex tsg_inuse_mutex;