gpu: nvgpu: add teardown_ch_tsg fifo ops

teardown_ch_tsg fifo ops added as t19x s/w recovery procedure
is different than legacy chips.

JIRA GPUT19X-7

Change-Id: I5b88f2c1a19d309e5c97c588ddf9689163a75fea
Signed-off-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-on: http://git-master/r/1327932
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>

1 files changed, 10 insertions, 0 deletions

diff --git a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.h b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.h
index a399e95f..6d1b902e 100644
--- a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.h
+++ b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.h
@@ -40,6 +40,9 @@
 
 #define GRFIFO_TIMEOUT_CHECK_PERIOD_US 100000
 
+#define RC_TYPE_NORMAL                  0
+#define RC_TYPE_MMU_FAULT               1
+
 /*
  * Number of entries in the kickoff latency buffer, used to calculate
  * the profiling and histogram. This number is calculated to be statistically
@@ -376,4 +379,11 @@ int gk20a_fifo_setup_userd(struct channel_gk20a *c);
 u32 gk20a_fifo_pbdma_acquire_val(u64 timeout);
 
 
+void gk20a_fifo_handle_runlist_event(struct gk20a *g);
+bool gk20a_fifo_should_defer_engine_reset(struct gk20a *g, u32 engine_id,
+                        u32 engine_subid, bool fake_fault);
+
+void gk20a_fifo_teardown_ch_tsg(struct gk20a *g, u32 __engine_ids,
+                        u32 hw_id, unsigned int id_type, unsigned int rc_type,
+                         struct mmu_fault_info *mmfault);
 #endif /*__GR_GK20A_H__*/