gpu: nvgpu: channel: make chid u32

The chid member of the channel_gk20a struct was being used as a unsigned
value. By being declared as an int, it was causing MISRA 10.3 violations
for implicit assignment of different types.

JIRA NVGPU-647

Change-Id: I7477fad6f0c837cf7ede1dba803158b1dda717af
Signed-off-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1918470
Signed-off-by: Debarshi Dutta <ddutta@nvidia.com>
(cherry picked from commit 1c7bb9b538200a11aa3ef31d72038d8ba820dfca in
dev-kernel)
Reviewed-on: https://git-master.nvidia.com/r/2008514
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

1 files changed, 1 insertions, 1 deletions

diff --git a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c
index e5ccfcb4..9691d51b 100644
--- a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c
@@ -3394,7 +3394,7 @@ u32 *gk20a_runlist_construct_locked(struct fifo_gk20a *f,
                 /* add runnable channels bound to this TSG */
                 nvgpu_list_for_each_entry(ch, &tsg->ch_list,
                                 channel_gk20a, ch_entry) {
-                        if (!test_bit(ch->chid,
+                        if (!test_bit((int)ch->chid,
                                       runlist->active_channels)) {
                                 continue;
                         }