gpu: nvgpu: Move Linux nvgpu_mem fields

Hide the Linux specific nvgpu_mem fields so that in subsequent patches
core code can instead of using struct sg_table it can use mem_desc.
Routines for accessing system specific fields will be added as needed.

This is the first step in a fairly major overhaul of the GMMU mapping
routines. There are numerous issues with the current design (or lack
there of): massively coupled code, system dependencies, disorganization,
etc.

JIRA NVGPU-12
JIRA NVGPU-30

Change-Id: I2e7d3ae3a07468cfc17c1c642d28ed1b0952474d
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: http://git-master/r/1464076
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

1 files changed, 2 insertions, 2 deletions

diff --git a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c
index 12bb3688..314d4551 100644
--- a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c
@@ -954,7 +954,7 @@ static int gk20a_init_fifo_setup_sw(struct gk20a *g)
 
         for (chid = 0; chid < f->num_channels; chid++) {
                 f->channel[chid].userd_iova =
-                        g->ops.mm.get_iova_addr(g, f->userd.sgt->sgl, 0)
+                        g->ops.mm.get_iova_addr(g, f->userd.priv.sgt->sgl, 0)
                         + chid * f->userd_entry_size;
                 f->channel[chid].userd_gpu_va =
                         f->userd.gpu_va + chid * f->userd_entry_size;
@@ -3148,7 +3148,7 @@ static int gk20a_fifo_update_runlist_locked(struct gk20a *g, u32 runlist_id,
         new_buf = !runlist->cur_buffer;
 
         runlist_iova = g->ops.mm.get_iova_addr(
-                        g, runlist->mem[new_buf].sgt->sgl, 0);
+                        g, runlist->mem[new_buf].priv.sgt->sgl, 0);
 
         gk20a_dbg_info("runlist_id : %d, switch to new buffer 0x%16llx",
                 runlist_id, (u64)runlist_iova);