gpu: nvgpu: separate IOCTL to set preemption mode

Add separate IOCTL NVGPU_IOCTL_CHANNEL_SET_PREEMPTION_MODE
to allow setting preemption modes from UMD

Define preemption modes in nvgpu.h and use them everywhere
Remove mode definitions from mm_gk20a.h

Also, we support setting only one preemption mode in a channel
But it is possible to have multiple preemption modes (one from
graphics and one from compute) set simultaneously

Hence, update struct gr_ctx_desc to include two separate
preemption modes (graphics_preempt_mode and compute_preempt_mode)

API NVGPU_IOCTL_CHANNEL_SET_PREEMPTION_MODE also supports
setting two separate preemption modes i.e. one for graphics
and one for compute

Make necessary changes in code to support two preemption
modes

Bug 1646259

Change-Id: Ia1dea19e609ba8cc0de2f39ab6c0c4cd6b0a752c
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/1131805
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>

1 files changed, 4 insertions, 4 deletions

diff --git a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c
index eccea4d4..dc3debf2 100644
--- a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c
@@ -2599,7 +2599,7 @@ static int gk20a_fifo_sched_debugfs_seq_show(
         runlist = &f->runlist_info[runlist_id];
 
         if (ch == f->channel) {
-                seq_puts(s, "chid     tsgid    pid      timeslice  timeout  interleave preempt\n");
+                seq_puts(s, "chid     tsgid    pid      timeslice  timeout  interleave graphics_preempt compute_preempt\n");
                 seq_puts(s, "                            (usecs)   (msecs)\n");
                 ret = 0;
         }
@@ -2611,15 +2611,15 @@ static int gk20a_fifo_sched_debugfs_seq_show(
                 if (gk20a_is_channel_marked_as_tsg(ch))
                         tsg = &f->tsg[ch->tsgid];
 
-                seq_printf(s, "%-8d %-8d %-8d %-9d %-8d %-10d %-8d\n",
+                seq_printf(s, "%-8d %-8d %-8d %-9d %-8d %-10d %-8d %-8d\n",
                                 ch->hw_chid,
                                 ch->tsgid,
                                 ch->pid,
                                 tsg ? tsg->timeslice_us : ch->timeslice_us,
                                 ch->timeout_ms_max,
                                 ch->interleave_level,
-                                ch->ch_ctx.gr_ctx ?
-                                        ch->ch_ctx.gr_ctx->preempt_mode : -1);
+                                ch->ch_ctx.gr_ctx ? ch->ch_ctx.gr_ctx->graphics_preempt_mode : -1,
+                                ch->ch_ctx.gr_ctx ? ch->ch_ctx.gr_ctx->compute_preempt_mode : -1);
                 gk20a_channel_put(ch);
         }
         return 0;