gpu: nvgpu: disable ce2 interrupts when unhandled

ce2 interrupts enabled only on gk20a and gm20b when
interrupts are handled through hal

Change-Id: Ib570db8f5f41e71e768b95e781153ec8a5d20015
Signed-off-by: Sam Payne <spayne@nvidia.com>
Reviewed-on: http://git-master/r/677447
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>

1 files changed, 3 insertions, 0 deletions

diff --git a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c
index b9183e76..cf1242ab 100644
--- a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c
@@ -145,6 +145,9 @@ u32 gk20a_fifo_engine_interrupt_mask(struct gk20a *g)
 
         for (i = 0; i < g->fifo.max_engines; i++) {
                 u32 intr_id = g->fifo.engine_info[i].intr_id;
+                if (i == ENGINE_CE2_GK20A &&
+                        (!g->ops.ce2.isr_stall || !g->ops.ce2.isr_nonstall))
+                        continue;
 
                 if (intr_id)
                         eng_intr_mask |= BIT(intr_id);