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authorMahantesh Kumbar <mkumbar@nvidia.com>2017-06-07 12:56:00 -0400
committermobile promotions <svcmobile_promotions@nvidia.com>2017-06-13 16:19:47 -0400
commitc18364d0c4b3fb6581f937c018cd01fc329601bb (patch)
tree923ab682435379dc8bad7852c49725bf7f0f5286 /drivers/gpu/nvgpu/gk20a/fifo_gk20a.c
parent45355f00e7de9068f403682044f550026fa7e86e (diff)
gpu: nvgpu: moved pg out from pmu_gk20a.c/h
- moved pg related code to pmu_pg.c under common/pmu folder PG state machine support methods PG ACK handlers AELPG methods PG enable/disable methods -prepended with nvgpu_ for elpg/aelpg global methods by replacing gk20a_ JIRA NVGPU-97 Change-Id: I2148a69ff86b5c5d43c521ff6e241db84afafd82 Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com> Reviewed-on: http://git-master/r/1498363 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gk20a/fifo_gk20a.c')
-rw-r--r--drivers/gpu/nvgpu/gk20a/fifo_gk20a.c8
1 files changed, 4 insertions, 4 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c
index 00b26cf4..5a571dc8 100644
--- a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c
@@ -1248,7 +1248,7 @@ void gk20a_fifo_reset_engine(struct gk20a *g, u32 engine_id)
1248 1248
1249 if (engine_enum == ENGINE_GR_GK20A) { 1249 if (engine_enum == ENGINE_GR_GK20A) {
1250 if (g->support_pmu && g->can_elpg) 1250 if (g->support_pmu && g->can_elpg)
1251 gk20a_pmu_disable_elpg(g); 1251 nvgpu_pmu_disable_elpg(g);
1252 /* resetting engine will alter read/write index. 1252 /* resetting engine will alter read/write index.
1253 * need to flush circular buffer before re-enabling FECS. 1253 * need to flush circular buffer before re-enabling FECS.
1254 */ 1254 */
@@ -1261,7 +1261,7 @@ void gk20a_fifo_reset_engine(struct gk20a *g, u32 engine_id)
1261 enough, we do full init sequence */ 1261 enough, we do full init sequence */
1262 gk20a_gr_reset(g); 1262 gk20a_gr_reset(g);
1263 if (g->support_pmu && g->can_elpg) 1263 if (g->support_pmu && g->can_elpg)
1264 gk20a_pmu_enable_elpg(g); 1264 nvgpu_pmu_enable_elpg(g);
1265 } 1265 }
1266 if ((engine_enum == ENGINE_GRCE_GK20A) || 1266 if ((engine_enum == ENGINE_GRCE_GK20A) ||
1267 (engine_enum == ENGINE_ASYNC_CE_GK20A)) { 1267 (engine_enum == ENGINE_ASYNC_CE_GK20A)) {
@@ -1496,7 +1496,7 @@ static bool gk20a_fifo_handle_mmu_fault(
1496 1496
1497 /* Disable power management */ 1497 /* Disable power management */
1498 if (g->support_pmu && g->can_elpg) 1498 if (g->support_pmu && g->can_elpg)
1499 gk20a_pmu_disable_elpg(g); 1499 nvgpu_pmu_disable_elpg(g);
1500 if (g->ops.clock_gating.slcg_gr_load_gating_prod) 1500 if (g->ops.clock_gating.slcg_gr_load_gating_prod)
1501 g->ops.clock_gating.slcg_gr_load_gating_prod(g, 1501 g->ops.clock_gating.slcg_gr_load_gating_prod(g,
1502 false); 1502 false);
@@ -1699,7 +1699,7 @@ static bool gk20a_fifo_handle_mmu_fault(
1699 1699
1700 /* It is safe to enable ELPG again. */ 1700 /* It is safe to enable ELPG again. */
1701 if (g->support_pmu && g->can_elpg) 1701 if (g->support_pmu && g->can_elpg)
1702 gk20a_pmu_enable_elpg(g); 1702 nvgpu_pmu_enable_elpg(g);
1703 1703
1704 return verbose; 1704 return verbose;
1705} 1705}