diff options
author | Seema Khowala <seemaj@nvidia.com> | 2017-05-22 17:34:08 -0400 |
---|---|---|
committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2017-05-30 14:04:10 -0400 |
commit | b817e9e207cca88698d28b6b4ab410f03d715171 (patch) | |
tree | 76e794e46a3276ab22776735a4d6c0f5f96b4165 /drivers/gpu/nvgpu/gk20a/fifo_gk20a.c | |
parent | c3192b5acc03bf4e65aa1cbefb3a9ea88d87d9bd (diff) |
gpu: nvgpu: add fifo ops get_mmu_fault_info
This is needed to take care of gp10b h/w header
changes. gp10b changes as compared to legacy gpu chips
-fault_info_fault_type field width is changed
-fault_info_write field is removed
-fault_info_access_type field is added
-fault_info_engine_subid is removed
-fault_info_client_type is added
-fault_info_client field width has changed
JIRA GPUT19X-7
JIRA GPUT19X-12
Change-Id: Iebf28cc6c851830524049b67a71cd72fb4a28948
Signed-off-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-on: http://git-master/r/1487319
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gk20a/fifo_gk20a.c')
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/fifo_gk20a.c | 47 |
1 files changed, 27 insertions, 20 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c index c7cd1d73..ac3a3d57 100644 --- a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c | |||
@@ -1165,29 +1165,12 @@ static const char * const does_not_exist[] = { | |||
1165 | "does not exist" | 1165 | "does not exist" |
1166 | }; | 1166 | }; |
1167 | 1167 | ||
1168 | /* reads info from hardware and fills in mmu fault info record */ | 1168 | static void get_exception_mmu_fault_info(struct gk20a *g, u32 mmu_fault_id, |
1169 | static void get_exception_mmu_fault_info( | ||
1170 | struct gk20a *g, u32 mmu_fault_id, | ||
1171 | struct mmu_fault_info *mmfault) | 1169 | struct mmu_fault_info *mmfault) |
1172 | { | 1170 | { |
1173 | u32 fault_info; | 1171 | g->ops.fifo.get_mmu_fault_info(g, mmu_fault_id, mmfault); |
1174 | u32 addr_lo, addr_hi; | ||
1175 | |||
1176 | gk20a_dbg_fn("mmu_fault_id %d", mmu_fault_id); | ||
1177 | |||
1178 | memset(mmfault, 0, sizeof(*mmfault)); | ||
1179 | |||
1180 | fault_info = gk20a_readl(g, | ||
1181 | fifo_intr_mmu_fault_info_r(mmu_fault_id)); | ||
1182 | mmfault->fault_type = | ||
1183 | fifo_intr_mmu_fault_info_type_v(fault_info); | ||
1184 | mmfault->access_type = | ||
1185 | fifo_intr_mmu_fault_info_write_v(fault_info); | ||
1186 | mmfault->client_type = | ||
1187 | fifo_intr_mmu_fault_info_engine_subid_v(fault_info); | ||
1188 | mmfault->client_id = | ||
1189 | fifo_intr_mmu_fault_info_client_v(fault_info); | ||
1190 | 1172 | ||
1173 | /* parse info */ | ||
1191 | if (mmfault->fault_type >= ARRAY_SIZE(fault_type_descs)) { | 1174 | if (mmfault->fault_type >= ARRAY_SIZE(fault_type_descs)) { |
1192 | WARN_ON(mmfault->fault_type >= ARRAY_SIZE(fault_type_descs)); | 1175 | WARN_ON(mmfault->fault_type >= ARRAY_SIZE(fault_type_descs)); |
1193 | mmfault->fault_type_desc = does_not_exist[0]; | 1176 | mmfault->fault_type_desc = does_not_exist[0]; |
@@ -1224,6 +1207,29 @@ static void get_exception_mmu_fault_info( | |||
1224 | mmfault->client_id_desc = | 1207 | mmfault->client_id_desc = |
1225 | gpc_client_descs[mmfault->client_id]; | 1208 | gpc_client_descs[mmfault->client_id]; |
1226 | } | 1209 | } |
1210 | } | ||
1211 | |||
1212 | /* reads info from hardware and fills in mmu fault info record */ | ||
1213 | void gk20a_fifo_get_mmu_fault_info(struct gk20a *g, u32 mmu_fault_id, | ||
1214 | struct mmu_fault_info *mmfault) | ||
1215 | { | ||
1216 | u32 fault_info; | ||
1217 | u32 addr_lo, addr_hi; | ||
1218 | |||
1219 | gk20a_dbg_fn("mmu_fault_id %d", mmu_fault_id); | ||
1220 | |||
1221 | memset(mmfault, 0, sizeof(*mmfault)); | ||
1222 | |||
1223 | fault_info = gk20a_readl(g, | ||
1224 | fifo_intr_mmu_fault_info_r(mmu_fault_id)); | ||
1225 | mmfault->fault_type = | ||
1226 | fifo_intr_mmu_fault_info_type_v(fault_info); | ||
1227 | mmfault->access_type = | ||
1228 | fifo_intr_mmu_fault_info_write_v(fault_info); | ||
1229 | mmfault->client_type = | ||
1230 | fifo_intr_mmu_fault_info_engine_subid_v(fault_info); | ||
1231 | mmfault->client_id = | ||
1232 | fifo_intr_mmu_fault_info_client_v(fault_info); | ||
1227 | 1233 | ||
1228 | addr_lo = gk20a_readl(g, fifo_intr_mmu_fault_lo_r(mmu_fault_id)); | 1234 | addr_lo = gk20a_readl(g, fifo_intr_mmu_fault_lo_r(mmu_fault_id)); |
1229 | addr_hi = gk20a_readl(g, fifo_intr_mmu_fault_hi_r(mmu_fault_id)); | 1235 | addr_hi = gk20a_readl(g, fifo_intr_mmu_fault_hi_r(mmu_fault_id)); |
@@ -4381,6 +4387,7 @@ void gk20a_init_fifo(struct gpu_ops *gops) | |||
4381 | gops->fifo.preempt_tsg = gk20a_fifo_preempt_tsg; | 4387 | gops->fifo.preempt_tsg = gk20a_fifo_preempt_tsg; |
4382 | gops->fifo.update_runlist = gk20a_fifo_update_runlist; | 4388 | gops->fifo.update_runlist = gk20a_fifo_update_runlist; |
4383 | gops->fifo.trigger_mmu_fault = gk20a_fifo_trigger_mmu_fault; | 4389 | gops->fifo.trigger_mmu_fault = gk20a_fifo_trigger_mmu_fault; |
4390 | gops->fifo.get_mmu_fault_info = gk20a_fifo_get_mmu_fault_info; | ||
4384 | gops->fifo.apply_pb_timeout = gk20a_fifo_apply_pb_timeout; | 4391 | gops->fifo.apply_pb_timeout = gk20a_fifo_apply_pb_timeout; |
4385 | gops->fifo.wait_engine_idle = gk20a_fifo_wait_engine_idle; | 4392 | gops->fifo.wait_engine_idle = gk20a_fifo_wait_engine_idle; |
4386 | gops->fifo.get_num_fifos = gk20a_fifo_get_num_fifos; | 4393 | gops->fifo.get_num_fifos = gk20a_fifo_get_num_fifos; |