diff options
author | Deepak Nibade <dnibade@nvidia.com> | 2016-03-22 04:46:40 -0400 |
---|---|---|
committer | Terje Bergstrom <tbergstrom@nvidia.com> | 2016-05-31 11:59:21 -0400 |
commit | 9c4f3799d1318aeb81d23816f8493d115aff2f86 (patch) | |
tree | cf1fa16388f926948756d5b230994d7aec72274d /drivers/gpu/nvgpu/gk20a/fifo_gk20a.c | |
parent | 6ff0d4e6ebdf72645b2e8c2631da72b6955200c8 (diff) |
gpu: nvgpu: add notifier for pbcrc mismatch
Add below notifier for pbcrc mismatch
NVGPU_CHANNEL_PBDMA_PUSHBUFFER_CRC_MISMATCH
And use this notifier value when we have
pbdma pbcrc interrupt pending
Bug 200179981
Change-Id: I289351e990afb0a4e002902881b99023530f6443
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/1156210
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gk20a/fifo_gk20a.c')
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/fifo_gk20a.c | 12 |
1 files changed, 9 insertions, 3 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c index 16ca16d8..92536b36 100644 --- a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c | |||
@@ -1689,6 +1689,7 @@ static u32 gk20a_fifo_handle_pbdma_intr(struct device *dev, | |||
1689 | u32 pbdma_intr_0 = gk20a_readl(g, pbdma_intr_0_r(pbdma_id)); | 1689 | u32 pbdma_intr_0 = gk20a_readl(g, pbdma_intr_0_r(pbdma_id)); |
1690 | u32 pbdma_intr_1 = gk20a_readl(g, pbdma_intr_1_r(pbdma_id)); | 1690 | u32 pbdma_intr_1 = gk20a_readl(g, pbdma_intr_1_r(pbdma_id)); |
1691 | u32 handled = 0; | 1691 | u32 handled = 0; |
1692 | u32 error_notifier = NVGPU_CHANNEL_PBDMA_ERROR; | ||
1692 | bool reset = false; | 1693 | bool reset = false; |
1693 | int i; | 1694 | int i; |
1694 | 1695 | ||
@@ -1740,6 +1741,12 @@ static u32 gk20a_fifo_handle_pbdma_intr(struct device *dev, | |||
1740 | reset = true; | 1741 | reset = true; |
1741 | } | 1742 | } |
1742 | 1743 | ||
1744 | if (pbdma_intr_0 & pbdma_intr_0_pbcrc_pending_f()) { | ||
1745 | error_notifier = | ||
1746 | NVGPU_CHANNEL_PBDMA_PUSHBUFFER_CRC_MISMATCH; | ||
1747 | reset = true; | ||
1748 | } | ||
1749 | |||
1743 | if (pbdma_intr_0 & pbdma_intr_0_device_pending_f()) { | 1750 | if (pbdma_intr_0 & pbdma_intr_0_device_pending_f()) { |
1744 | gk20a_fifo_reset_pbdma_header(g, pbdma_id); | 1751 | gk20a_fifo_reset_pbdma_header(g, pbdma_id); |
1745 | 1752 | ||
@@ -1773,8 +1780,7 @@ static u32 gk20a_fifo_handle_pbdma_intr(struct device *dev, | |||
1773 | struct channel_gk20a *ch = &f->channel[id]; | 1780 | struct channel_gk20a *ch = &f->channel[id]; |
1774 | 1781 | ||
1775 | if (gk20a_channel_get(ch)) { | 1782 | if (gk20a_channel_get(ch)) { |
1776 | gk20a_set_error_notifier(ch, | 1783 | gk20a_set_error_notifier(ch, error_notifier); |
1777 | NVGPU_CHANNEL_PBDMA_ERROR); | ||
1778 | gk20a_fifo_recover_ch(g, id, true); | 1784 | gk20a_fifo_recover_ch(g, id, true); |
1779 | gk20a_channel_put(ch); | 1785 | gk20a_channel_put(ch); |
1780 | } | 1786 | } |
@@ -1787,7 +1793,7 @@ static u32 gk20a_fifo_handle_pbdma_intr(struct device *dev, | |||
1787 | list_for_each_entry(ch, &tsg->ch_list, ch_entry) { | 1793 | list_for_each_entry(ch, &tsg->ch_list, ch_entry) { |
1788 | if (gk20a_channel_get(ch)) { | 1794 | if (gk20a_channel_get(ch)) { |
1789 | gk20a_set_error_notifier(ch, | 1795 | gk20a_set_error_notifier(ch, |
1790 | NVGPU_CHANNEL_PBDMA_ERROR); | 1796 | error_notifier); |
1791 | gk20a_channel_put(ch); | 1797 | gk20a_channel_put(ch); |
1792 | } | 1798 | } |
1793 | } | 1799 | } |