gpu: nvgpu: gm20b: Regenerate clock gating lists

Regenerate clock gating lists. Add new blocks, and takes them into
use. Also moves some clock gating settings to be applied at the
earliest possible moment right after reset.

Change-Id: I21888186c200f7a477c63bd3332e8ed578f63741
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/457698

1 files changed, 10 insertions, 0 deletions

diff --git a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c
index e6b3fd5f..230e1722 100644
--- a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c
@@ -385,6 +385,16 @@ int gk20a_init_fifo_reset_enable_hw(struct gk20a *g)
         gk20a_reset(g, mc_enable_pfifo_enabled_f()
                         | mc_enable_ce2_enabled_f());
 
+        if (g->ops.clock_gating.slcg_ce2_load_gating_prod)
+                g->ops.clock_gating.slcg_ce2_load_gating_prod(g,
+                                g->slcg_enabled);
+        if (g->ops.clock_gating.slcg_fifo_load_gating_prod)
+                g->ops.clock_gating.slcg_fifo_load_gating_prod(g,
+                                g->slcg_enabled);
+        if (g->ops.clock_gating.blcg_fifo_load_gating_prod)
+                g->ops.clock_gating.blcg_fifo_load_gating_prod(g,
+                                g->blcg_enabled);
+
         /* enable pbdma */
         mask = 0;
         for (i = 0; i < proj_host_num_pbdma_v(); ++i)