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| author | Alex Frid <afrid@nvidia.com> | 2014-09-04 00:01:10 -0400 |
|---|---|---|
| committer | Dan Willemsen <dwillemsen@nvidia.com> | 2015-03-18 15:11:16 -0400 |
| commit | 5bb95a3e41be5ceec13653b7c3040f2bbcfc2076 (patch) | |
| tree | 8b164bfad33e9f5e93b10fdd730107d526bb7d7c /drivers/gpu/nvgpu/gk20a/fifo_gk20a.c | |
| parent | 59f00a42e47ccf4aacfac01d1e97b66537a01aed (diff) | |
gpu: nvgpu: Update GM20B GPCPLL bypass operations
- Skipped PLL re-locking if only post-divider is changing under bypass
- Added 1us delay after switch to bypass clock source
- Changed wait for lock under bypass resolution from 2us to 1us
Change-Id: I259581c00c417752263ef3b2ea057200bb78ecbf
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/495473
(cherry picked from commit d90a19b8bf59c608a2a3a891b34ca714dfe990e9)
Reviewed-on: http://git-master/r/499192
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gk20a/fifo_gk20a.c')
0 files changed, 0 insertions, 0 deletions